Combination three phase-one phase inverter

Claim 2

In a static inverter having first, second and third outputs, a controlled drive means for selectively supplying the outputs 120* out of phase for three-phase operation or in phase for single-phase operation said controlled drive means including a logic circuit comprising, a two position ''''mode'''' switch connected to said circuit for selecting three-phase or singlephase operation, OR gates for said second and third outputs, an AND gate between said first output and said OR gates, means connecting said AND gate to said ''''mode'''' switch to be enabled upon selecting single-phase operation to effectively connect the outputs in parallel, NAND gates for said second and third outputs, and means connecting said NAND gates to said ''''mode'''' switch to be enabled upon selecting three-phase operation to permit said outputs to operate 120* out of phase.

Claim 3

In a static inverter convertible between three-phase and single-phase operation with the same power output capability and including first, second and third single-phase channels logic circuitry for causing said channels to operate 120* out of phase in three-phase configuration or to operate in phase and parallel connection in single-phase configuration, said logic circuitry comprising a ''''mode'''' switch having three-phase and single-phase positions, NAND gate means for said second and third channels connected to said three-phase position and enabled thereby to cause the channels to operate 120* out of phase, OR gate means for said second and third channels connected to said first channel through AND gate means, and means connecting the single-phase position of said ''''mode'''' switch to said AND gate means and enabled thereby to cause the channels to be connected in parallel single-phase configuration.

Claim 4

In a static inverter convertible between three-phase and single-phase operation with the same power output capability and including first, second and third single-phase channels logic circuitry for causing said channels to operate 120* out of phase in three-phase configuration or to operate in phase and parallel connection in single-phase configuration, said logic circuitry comprising a ''''mode'''' switch having three-phase and single-phase positions, NAND gate means for said second and third channels connected to said three-phase position and enabled thereby to cause the channels to operate 120* out of phase, OR gate means for said second and third channels connected to said first channel through AND gate means, and means connecting the single-phase position of said ''''mode'''' switch to said AND gate means and enabled thereby to cause the channels to be connected in parallel single-phase configuration.

Claim 5

The combination of claim 2 wherein said ''''mode'''' switch in three-phase position connects said channels to be connected in ''''Wye'''' configuration.