Video logarithmic amplifier

Claim 2

Circuit apparatus for providing an output signal logarithmically proportional to an input signal, said circuit apparatus comprising: a differential amplifier stage having first and second input means, and first output means, one of said first and second input means being of the inverter type, and the other of said input means being of the noninverter type; and an output stage having third input means coupled to said first output means, feedback means coupled to said second input means, and second output means, a predetermined one of the output stage''s last two mentioned means, to wit: said feedback means and said second output means, having a first element therein, with a log transfer characteristic, the other of said last two mentioned means having a second element in series coupling relationship with said first element, said second element coacting with said first element to provide an antilog transfer characteristic in said second element; said apparatus developing said output signal across a predetermined one of said first and second elements whenever said input signal is applied to said first input means, and said apparatus developing a feedback signal across the other of said first and second elements, said feedback signal being applied to said second input means.

Claim 3

Circuit apparatus according to claim 1 wherein said input signal represents a number and said output signal represents the logarithm of said number in a predetermined logarithmal system.

Claim 4

Circuit apparatus according to claim 1 wherein said input signal represents a logarithm and said output signal represents its corresponding antilogarithm in a predetermined logarithmal system.

Claim 5

Circuit apparatus according to claim 1 wherein said feedback means provides a feedback signAl to said second input means, said feedback signal maintaining said differential amplifier stage in a balanced condition in the absence and presence of input signals to said first input means.

Claim 6

A video log amplifier for providing an output signal logarithmically proportional to an input signal, said amplifier comprising: a differential amplifier stage having first and second input means, and a first output means, one of said first and second input means being of the inverter type, and the other of said input means being of the noninverter type; and an output stage having third input means coupled to said first output means, feedback means coupled to said second input means for providing a feedback signal thereto, and second output means, a predetermined one of the output stage''s last two mentioned means, to wit: said feedback means and said second output means, having a first element therein with a log transfer characteristic, the other of said last two mentioned means having a second element in series coupling relationship with said first element, said second element coacting with said first element to provide an antilog transfer characteristic in said second element; said video log amplifier developing said output signal across a predetermined one of said first and second elements whenever said input signal is applied to said first input means, said video log amplifier developing said feedback signal across the other of said first and second elements, and said feedback signal maintaining said differential amplifier stage in a balanced condition in the absence and presence of input signals to said first input means.

Claim 7

A video log amplifier for providing an output signal logarithmically proportional to an input signal, said amplifier comprising: a differential amplifier stage having first and second input means, and a first output means, one of said first and second input means being of the inverter type, and the other of said input means being of the noninverter type; and an output stage having third input means coupled to said first output means, feedback means coupled to said second input means for providing a feedback signal thereto, and second output means, a predetermined one of the output stage''s last two mentioned means, to wit: said feedback means and said second output means, having a first element therein with a log transfer characteristic, the other of said last two mentioned means having a second element in series coupling relationship with said first element, said second element coacting with said first element to provide an antilog transfer characteristic in said second element; said video log amplifier developing said output signal across a predetermined one of said first and second elements whenever said input signal is applied to said first input means, said video log amplifier developing said feedback signal across the other of said first and second elements, and said feedback signal maintaining said differential amplifier stage in a balanced condition in the absence and presence of input signals to said first input means.

Claim 8

A video log amplifier according to claim 5 further comprising: selective switching means having a first position for selectively switching the first element into said second output means and said second element into said feedback means to provide an output signal at said second output means which represents the logarithm of the number represented by the input signal applied to said first input means, and having a second position for selectively switching the first element into said feedback means and said second element into said second output means to provide an output signal at said second output means which represents the antilogarithm of the logarithm represented by the input signal.

Claim 9

A video log amplifier circuit according to claim 6 wherein said first and second input means comprise first and second high impedance isolation amplifier stages, respectively.

Claim 10

A semiconductor video log amplifier for converting an input pulse train signal into an output pulse train signal which is logarithmically proportional thereto, said amplifier comprising: a differential amplifier having a pair of first and second transistorized amplifier stages, each of said amplifier stages having base, emitter and collector circuits associated therewith, said first and second amplifier stages being configured as a common emitter type, the respective base and emitter circuits of said first and second amplifier stages having a predetermined symmetry and said collector circuits thereof having a predetermined asymmetry, and first output means coupled to the collector circuit of said second amplifier stage for providing a control signal thereat; first and second input means coupled to the base circuit of said first amplifier stage and to the base circuit of said second amplifier stage, respectively; and an output stage having a pair of first and second serially connected circuit elements, said first element being a semiconductor log diode, said second circuit element being a resistor, a semiconductor switch having a control electrode connected to said first output means, said semiconductor switch connecting the log diode in a forward direction bias, and second output means being provided across a predetermined one of said first and second circuit elements, the other of said first and second circuit elements providing a feedback signal thereacrosS and being coupled to said second input means; said video log amplifier providing said output pulse train signal at said second output means whenever said input pulse train signal is applied to said first input means, said feedback signal maintaining said differential amplifier in a balanced condition in the absence and presence of said input signal to said first input means.

Claim 11

A semiconductor video log amplifier for converting an input pulse train signal into an output pulse train signal which is logarithmically proportional thereto, said amplifier comprising: a differential amplifier having a pair of first and second transistorized amplifier stages, each of said amplifier stages having base, emitter and collector circuits associated therewith, said first and second amplifier stages being configured as a common emitter type, the respective base and emitter circuits of said first and second amplifier stages having a predetermined symmetry and said collector circuits thereof having a predetermined asymmetry, and first output means coupled to the collector circuit of said second amplifier stage for providing a control signal thereat; first and second input means coupled to the base circuit of said first amplifier stage and to the base circuit of said second amplifier stage, respectively; and an output stage having a pair of first and second serially connected circuit elements, said first element being a semiconductor log diode, said second circuit element being a resistor, a semiconductor switch having a control electrode connected to said first output means, said semiconductor switch connecting the log diode in a forward direction bias, and second output means being provided across a predetermined one of said first and second circuit elements, the other of said first and second circuit elements providing a feedback signal thereacrosS and being coupled to said second input means; said video log amplifier providing said output pulse train signal at said second output means whenever said input pulse train signal is applied to said first input means, said feedback signal maintaining said differential amplifier in a balanced condition in the absence and presence of said input signal to said first input means.

Claim 12

A video log amplifier according to claim 8 wherein said first and second input means comprise first and second field effect transistors, respectively.

Claim 13

A video log amplifier according to claim 8 further comprising a transistorized constant current generator coupled to the junction of the emitter circuits of said first and second amplifier stages.

Claim 14

A semiconductor video log amplifier for converting an input pulse train signal into an output pulse train signal which is logarithmically proportional thereto, said amplifier comprising: a differential amplifier having a pair of first and second transistorized amplifier stages, each of said amplifier stages having base, emitter and collector circuits associated therewith, each of said first and second amplifier stages being configured as a common emitter type, the respective base and emitter circuits of said first and second amplifier stages having a predetermined symmetry and said collector circuits thereof having a predetermined asymmetry, and first output means coupled to the collector circuit of said second amplifier stage for providing a control signal thereat; first and second input means coupled to the base circuit of said first amplifier stage and to the base circuit of said second amplifier stage, respectively; an output stage having a pair of first and second serially connected circuit elements, said first element being a semiconductor log diode, said second circuit element being a resistor, a semiconductor switch having a control electrode connected to said first output means, said semiconductor switch connecting the log diode in a forward direction bias, and second output means being provided across a predetermined one of said first and second circuit elements providing, the other of said first and second circuit elements providing a feedback signal thereacross and being coupled to said second input means; said video log amplifier providing said output pulse train signal at said second output means whenever said input pulse train signal is applied to said first input means, said feedback signal maintaining said differential amplifier in a balanced condition in the absence and presence of said input signal to said first input means; and selective switching means having a first position for selectively switching the log diode across said second output means and said resistor across said second input means, and having a second position for selectively switching the resistor across said second output means and said log diode across said second input means, said output signal at said second output means in said first position of said switching means representing the logarithm of the number represented by said input signal present at said first input means, and said output signal at said second output means in said second position of said switching means representing the antilogarithm of the logarithm represented by said input signal present at said first input means.

Claim 15

A semiconductor video log amplifier for converting an input pulse train signal into an output pulse train signal which is logarithmically proportional thereto, said amplifier comprising: a differential amplifier having a pair of first and second transistorized amplifier stages, each of said amplifier stages having base, emitter and collector circuits associated therewith, each of said first and second amplifier stages being configured as a common emitter type, the respective base and emitter circuits of said first and second amplifier stages having a predetermined symmetry and said collector circuits thereof having a predetermined asymmetry, and first output means coupled to the collector circuit of said second amplifier stage for providing a control signal thereat; first and second input means coupled to the base circuit of said first amplifier stage and to the base circuit of said second amplifier stage, respectively; an output stage having a pair of first and second serially connected circuit elements, said first element being a semiconductor log diode, said second circuit element being a resistor, a semiconductor switch having a control electrode connected to said first output means, said semiconductor switch connecting the log diode in a forward direction bias, and second output means being provided across a predetermined one of said first and second circuit elements providing, the other of said first and second circuit elements providing a feedback signal thereacross and being coupled to said second input means; said video log amplifier providing said output pulse train signal at said second output means whenever said input pulse train signal is applied to said first input means, said feedback signal maintaining said differential amplifier in a balanced condition in the absence and presence of said input signal to said first input means; and selective switching means having a first position for selectively switching the log diode across said second output means and said resistor across said second input means, and having a second position for selectively switching the resistor across said second output means and said log diode across said second input means, said output signal at said second output means in said first position of said switching means representing the logarithm of the number represented by said input signal present at said first input means, and said output signal at said second output means in said second position of said switching means representing the antilogarithm of the logarithm represented by said input signal present at said first input means.