US3573445A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Device for programmed check of digital computers
Assignee: Individual
•
Filing: 1969-07-07
•
Granted: 1971-04-06
•
Expires: 1989-07-07
Abstract
Abstract A programmed device for detecting faults in digital computers comprises an interrogation matrix ensuring activation of computer elements checked, an operating signal registration matrix that registers the operating signals arriving from the computer elements checked after their being activated by the interrogation matrix, a noise signal registration matrix, a unit for controlling said matrices, a switching board maintaining the connection between inputs of the computer elements checked and outputs of said interrogation matrix, and between outputs of the elements checked with inputs of said operating signal registration matrix and noise signal registration matrix.
Inventors
- 👤 Ludmila Alexandrovna Korytnaja
- 👤 Boris Nickoaevich Malinovsky
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-22 18:51
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/22
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
202 words
A programmed device for detecting faults in digital computers, comprising: an interrogation matrix for producing signals activating the computer elements preselected to be checked; an operating signal registration matrix for receiving and measuring the value of the operating signals arriving from each preselected computer element chEcked after the latter is activated by the signal of said interrogation matrix; a noise signal registration matrix adapted to receive and measure the value of the noise signals arriving from each preselected computer element checked; a switching board for composing the checking program and for maintaining connection between the inputs and outputs of the computer elements checked and said interrogation matrix, operating signal registration matrix and noise signal registration matrix; a control means which controls said matrices used to produce signals insuring in-step operation of said matrices and of the computer elements checked, to form and store the numbers of the computer elements preselected to be checked, to interrupt the checking cycle when the computer element or module checked is found to be out of order and to indicate the number of the faulty computer element or module; said control means being connected with said interrogation matrix, operating signal registration matrix and noise signal registration matrix.
Claim 2
Dependent Claim
202 words
A programmed device for detecting faults in digital computers, comprising: an interrogation matrix for producing signals activating the computer elements preselected to be checked; an operating signal registration matrix for receiving and measuring the value of the operating signals arriving from each preselected computer element chEcked after the latter is activated by the signal of said interrogation matrix; a noise signal registration matrix adapted to receive and measure the value of the noise signals arriving from each preselected computer element checked; a switching board for composing the checking program and for maintaining connection between the inputs and outputs of the computer elements checked and said interrogation matrix, operating signal registration matrix and noise signal registration matrix; a control means which controls said matrices used to produce signals insuring in-step operation of said matrices and of the computer elements checked, to form and store the numbers of the computer elements preselected to be checked, to interrupt the checking cycle when the computer element or module checked is found to be out of order and to indicate the number of the faulty computer element or module; said control means being connected with said interrogation matrix, operating signal registration matrix and noise signal registration matrix.
Claim 3
Dependent Claim
74 words
A programmed device as claimed in claim 1, comprising a decoder of said control means, said decoder controlling said interrogation matrix; a binary counter of said control means, said binary counter controlling said decoder; said interrogation matrix including coincidence elements and amplifiers, the number thereof being described as m 2p, where m is the number of outputs of said decoder and p 1, 2, 3... is the number of digits of said binary counter.
Claim 4
Dependent Claim
111 words
A programmed device as claimed in claim 1, comprising a decoder of said control means, said decoder controlling said operating signal registration matrix; a binary counter of said control means, said binary counter controlling said decoder; said operating signal registration matrix including coincidence elements, OR elements and amplifiers, the number of said coincidence elements being described as m 2p, where m is the number of outputs of said decoder and 1, 2, 3... -is the number of digits of said binary counter; said amplifiers of the operating signal registration matrix having an operation threshold equal to the optimal voltage ampliti amplitude of the operating signals arriving from the compute elements checked.
Claim 5
Dependent Claim
118 words
A programmed device as claimed in claim 1, comprising a decoder of said control means, said decoder controlling said noise registration matrix; a binary counter of said control means for controlling said decoder; said noise signal registration matrix including coincidence elements, OR elements and amplifiers; the number of the coincidence elements of the noise signal registration matrix being described as m 2P, where m is the number of outputs of said decoder and p 1, 2, 3... is the number of digits of said binary counter; said amplifiers of the noise signal registration matrix having an operation threshold equal to the maximum permissible value of the voltage amplitude of the noise signals arriving from the computer elements checked.
References Cited (Backward Citations)
US3077579A
Cited
US3213428A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-04-05 | 1974-10-05 | 1975-04-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-04-05 | 1978-10-05 | 1979-04-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-04-05 | 1982-10-05 | 1983-04-06 | $7700.00 | Window Closed / Lapsed |