US3573442A
Expired / Lapsed
US
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Sampled data hybrid analogue-digital computer system
Assignee: Honeywell Inc
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Filing: 1967-06-16
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Granted: 1971-04-06
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Expires: 1987-06-16
Abstract
Abstract A hybrid analog-digital computer apparatus, particularly applicable in controlling complex servomechanisms such as aircraft flight control actuation and display systems, comprising a time shared or multiplexed operational amplifier adapted to receive analog signals from control system inputs and command sources through a large plurality of solid state switching devices at controllable gain levels and to supply outputs through a plurality of similar output switching devices to a plurality of analog storage devices, such as simple capacitors, the charges on the capacitors being fed back to the amplifier input in predetermined controlled manners for performing various control functions; the computer outputs being the resultant charges on one or more of said capacitors and being supplied to the actuation and/or display devices. Through predetermined control of the input and output switches, one or more input signals are selected and various computational operations thereon are performed as required for proper system control. The signals to be selected and the computations to be performed are under the control of a programmed digital memory, the sequential word and word bit outputs of which determine the sequence and orders respectively of switch operations and the signal gains required. The digital format of the program output and the high-speed operation of the solid-state switches provide extremely rapid sequencing of desired computations while the data always remains in analog form thereby retaining the precise resolution of analog computers while providing the high-speed capability of digital computers. Since all the computations are determined by the programmed memory, the computer is adaptable to control systems of widely different characteristics and complexity merely by the addition or deletion of switches and storage capacitors and by inserting the proper program into the memory. Hence, in terms of aircraft automatic flight control, a truly ''''universal'''' flight control system.
Inventors
- 👤 Richard E Andeen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 21:44
CPC Classifications
G; G06; G06G; G06G7/00; G06G7/06; G05; G05D; G05D1/00; G05D1/04; G05D1/06; G05D1/0607; G06G7/12; G06G7/16; G06G7/164; G06G7/18; G06G7/184; G06G7/22; H; H03; H03H; H03H15/00; H03H15/02
Claims Analysis
Total Claims: 27
Claim 1
Independent Claim
203 words
A sampled data computer for performing predetermined computation on analog information signals comprising: a. a high gain differential amplifier means having noninverting and inverting inputs and an output and an impedance means coupling said output to said inverting input for adding and subtracting signals applied to said amplifier inputs; b. means supplying analog information signals to at least one of said amplifier inputs; c. a plurality of analog signal storage means responsive to the output of said amplifier; d. a plurality of switch means having conducting and nonconducting states for connecting said amplifier output to said signal storage means and for connecting said storage means back to said amplifier inputs for combining the signals stored therein with said information signals; e. digital memory means connected to control said plurality of switch means in accordance with a predetermined program, said program comprising a plurality of sequential word instructions, each word comprising a plurality of bits corresponding to said plurality of switches for controlling the states of said switches, said program determining the computation to be performed on said analogue information signal; and f. an output means coupled with at least one of said signal storage means and responsive to the resultant signal stored thereon.
Claim 2
Dependent Claim
203 words
A sampled data computer for performing predetermined computation on analog information signals comprising: a. a high gain differential amplifier means having noninverting and inverting inputs and an output and an impedance means coupling said output to said inverting input for adding and subtracting signals applied to said amplifier inputs; b. means supplying analog information signals to at least one of said amplifier inputs; c. a plurality of analog signal storage means responsive to the output of said amplifier; d. a plurality of switch means having conducting and nonconducting states for connecting said amplifier output to said signal storage means and for connecting said storage means back to said amplifier inputs for combining the signals stored therein with said information signals; e. digital memory means connected to control said plurality of switch means in accordance with a predetermined program, said program comprising a plurality of sequential word instructions, each word comprising a plurality of bits corresponding to said plurality of switches for controlling the states of said switches, said program determining the computation to be performed on said analogue information signal; and f. an output means coupled with at least one of said signal storage means and responsive to the resultant signal stored thereon.
Claim 3
Dependent Claim
18 words
The sampled data computer as set forth in claim 1 wherein said analog storage means comprises capacitor devices.
Claim 4
Dependent Claim
26 words
a plurality of analog signal storage means and a store logic for connecting the output of said amplifier means to selected ones of said storage means;
Claim 5
Dependent Claim
26 words
a plurality of analog signal storage means and a store logic for connecting the output of said amplifier means to selected ones of said storage means;
Claim 6
Dependent Claim
42 words
a read logic for connecting selected ones of said analog sensor signals to said amplifier inputs, said read logic also connecting selected ones of said storage means to said amplifier inputs whereby to provide selective feedback connections for sAid amplifier means; and
Claim 7
Dependent Claim
42 words
a read logic for connecting selected ones of said analog sensor signals to said amplifier inputs, said read logic also connecting selected ones of said storage means to said amplifier inputs whereby to provide selective feedback connections for sAid amplifier means; and
Claim 8
Dependent Claim
21 words
The sampled data computer as set forth in claim 1 wherein said switching devices comprise electronic switches of the transistor type.
Claim 9
Dependent Claim
79 words
a digital memory means for controlling said read and store logics, said memory including a digital program comprising a plurality of sequentially read words for determining the computations to be performed on said signals, each word comprising word bits for determining the operation of of said read and store logic corresponding to the computations to be performed; and d. means coupled with selected ones of said storage means for supplying the analog signals stored thereon to said servomotor means.
Claim 10
Dependent Claim
79 words
a digital memory means for controlling said read and store logics, said memory including a digital program comprising a plurality of sequentially read words for determining the computations to be performed on said signals, each word comprising word bits for determining the operation of of said read and store logic corresponding to the computations to be performed; and d. means coupled with selected ones of said storage means for supplying the analog signals stored thereon to said servomotor means.
Claim 11
Dependent Claim
238 words
The sampled data computer as set forth in claim 1 for computing the integral of said information signal wherein: a. said information signal is applied to said noninverting input of said amplifier; b. said signal storage means comprises at least first and second signal storage devices; c. said plurality of switches comprises at least first and second switches for selectively connecting said amplifier output to said first and second storage devices respectively and third and fourth switches for selectively connecting the signal stored on said first and second storage devices respectively back to the noninverting input of said amplifier; d. said digital memory supplied at least two sequential instruction words repeated over a time period each comprising at least four bits, the first instruction word bits being such that said first and fourth switches are closed and said second and third switches are open whereby to apply the signal stored on said second storage device to said amplifier input and to apply said amplifier output to said first signal storage device, and the second instruction word bits being such that second and third switches are closed and said first and fourth switches are open whereby to apply the signal stored on said first storage device to said amplIfier input and to apply said amplifier output to said second signal storage device, and so on; and wherein e. said output means is coupled with said second signal storage device.
Claim 12
Dependent Claim
59 words
The sampled data computer as set forth in claim 4 further including: additional switch means and additional digital word and word bits for connecting the output signal stored on said second signal storage means to the inverting input of said amplifier for opposing said information signal whereby to provide a low pass filtering function of said analog information signal.
Claim 13
Dependent Claim
211 words
The sampled data computer as set forth in claim 1 for limiting the value of said information signal to any desired value wherein: a. said differential amplifier output to said inverting input coupling means includes means for limiting the magnitude of said amplifier output to a predetermined fixed value and limiter switch means having conducting and nonconducting states for rending said limiting means effective and noneffective; and further including; b. variable impedance means coupling said information signal to the noninverting input of said amplifier and including switch means for determining the impedance to said signal whereby to determine the gain thereof; and c. said signal storage means includes at least first and second storage means; and wherein d. said programmed digital memory includes a first instruction word for controlling said switch means such as to select the gain of said information signal, limit the same to said predetermined value and supply said limited signal to said first signal storage means, and a second instruction word for controlling said switch means such as to render said limiting means noneffective, supply said stored signal to said variable impedance means whereby to vary the value thereof in accordance with said reciprocal impedance value, and for storing the resulted signal in said second storage means.
Claim 14
Dependent Claim
43 words
The sampled data limiter as set forth in claim 6 further including means responsive to said information signal and the output of said second signal storage means for supplying an output in accordance with the difference therebetween whereby to provide a deadband function.
Claim 15
Dependent Claim
219 words
The sampled data computer as set forth in claim 1 for computing the product of two analog input signals wherein: a. said means supplying analog information signals includes switching means for supplying two information signals to said noninverting amplifier input and one of said information signals to said inverting amplifier input; wherein b. said signal storage means includes at least four signal storage means; further including c. a squaring circuit including switching means for coupling the output of one of said storage means to the noninverting input of said amplifier; and further including d. impedance means including switching means for coupling a predetermined portion of the signals stored on second and third of said storage means to said noninverting input; and wherein e. said programmed digital memory includes a group of instruction words for controlling said switch means such as to store signals proportional to the squares of the sum and difference of said input signals on said second and third storage means, respectively, and a further instruction word for controlling said switching means such as to supply the signals stored on said second and third storage means to said impedance means and the output of said amplifier to the fourth of said storage means, whereby the signal stored thereon is proportioned to the product of said input signals.
Claim 16
Dependent Claim
141 words
The sampled data multiplier as set forth in claim 8 wherein said group of instruction words comprises a first instruction word for controlling said switching means such as to store on said one storage means the sum of said input signals, a second instruction word for controlling said switching such as to couple the signal stored in said one storage means to said squaring circuit and to store the Output of said amplifier on second of said storage means, a third instruction word for controlling said switching means such as to store on said one storage means the difference of said input signals, and a fourth instruction word for controlling said switch such as to couple the signal stored on said one storage means to said squaring circuit and to store the output of said amplifier on said third storage means.
Claim 17
Dependent Claim
248 words
A sampled data computer system for performing a plurality of computations on a plurality of analog input signals and for supplying analog output signals proportional to predetermined functions of said input signals, said system comprising: a. a multiplexed high gain differential amplifier means having inverting and noninverting inputs and an output and including a feedback impedance connecting said output to said inverting input whereby to add and subtract signal quantities applied thereto; b. a plurality of analog signal storage means; c. a plurality of output switching devices having conducting and nonconducting states for selectively connecting said amplifier output to corresponding ones of said signal storage means depending upon the states thereof whereby to store said amplifier output in said selected storage means; d. a plurality of input switching devices having conducting and nonconducting states for selectively connecting a plurality of signals to said amplifier inputs depending upon the states thereof, said plurality of signals including said analog input signals and selected ones of the signals stored on said storage means; e. a programmed digital memory means for determining the functions to be performed on said input signals, said digital memory providing sequentially read words, each word comprising a plurality of bits corresponding to said plurality of switch devices, whereby to control the sequence and order respectively of switch states required for performing said functions; and f. means coupled with selected ones of said signal storage means for supplying analog output signals corresponding to the resultant signals stored thereon.
Claim 18
Dependent Claim
248 words
A sampled data computer system for performing a plurality of computations on a plurality of analog input signals and for supplying analog output signals proportional to predetermined functions of said input signals, said system comprising: a. a multiplexed high gain differential amplifier means having inverting and noninverting inputs and an output and including a feedback impedance connecting said output to said inverting input whereby to add and subtract signal quantities applied thereto; b. a plurality of analog signal storage means; c. a plurality of output switching devices having conducting and nonconducting states for selectively connecting said amplifier output to corresponding ones of said signal storage means depending upon the states thereof whereby to store said amplifier output in said selected storage means; d. a plurality of input switching devices having conducting and nonconducting states for selectively connecting a plurality of signals to said amplifier inputs depending upon the states thereof, said plurality of signals including said analog input signals and selected ones of the signals stored on said storage means; e. a programmed digital memory means for determining the functions to be performed on said input signals, said digital memory providing sequentially read words, each word comprising a plurality of bits corresponding to said plurality of switch devices, whereby to control the sequence and order respectively of switch states required for performing said functions; and f. means coupled with selected ones of said signal storage means for supplying analog output signals corresponding to the resultant signals stored thereon.
Claim 19
Dependent Claim
33 words
The sampled data computer as set forth in claim 10 further including a plurality of impedances coupled between said input switches and said amplifier inputs for determining the gains of said selected signals.
Claim 20
Dependent Claim
65 words
The sampled data computer as set forth in claim 11 wherein at least one of said impedances comprises a resistance ladder network and a plurality of switches for selecting the resultant impedance thereof, and wherein said digital program memory includes word bits for controlling said ladder switches whereby to program the gains of said selected input signals in accordance with the function to be performed.
Claim 21
Dependent Claim
80 words
A digitally controlled, analog servomechanism comprising: a. a plurality of sensors for producing a plurality of analog signals each proportional to one of a plurality of conditions to be controlled; b. servomotor means for controlling said conditions; c. sampled data computer means responsive to said sensor signals for performing a plurality of predetermined computations thereon and for supplying resultant output signals to said servomotor means whereby to control said conditions in accordance with said predetermined computations, said computer means comprising:
Claim 22
Dependent Claim
80 words
A digitally controlled, analog servomechanism comprising: a. a plurality of sensors for producing a plurality of analog signals each proportional to one of a plurality of conditions to be controlled; b. servomotor means for controlling said conditions; c. sampled data computer means responsive to said sensor signals for performing a plurality of predetermined computations thereon and for supplying resultant output signals to said servomotor means whereby to control said conditions in accordance with said predetermined computations, said computer means comprising:
Claim 23
Dependent Claim
301 words
A sampled data computer for computing a general plural order filter function of an analog information signal comprising: a. a multiplexed high gain differential amplifier means having noninverting and inverting inputs, an output and a feedback impedance connected from said output to said inverting input for adding and subtracting analog signals applied to said inputs; b. a plurality of analog signal storage devices related in number to the order of the filter function to be performed, the signal stored on one of said storage devices constituting the output of said computer; c. a plurality of charge switches corresponding in number to the number of said storage means for coupling said amplifier output thereto; d. a plurality of input switches related in number to the order of the filter function to be performed for coupling signals applied thereto to said amplifier inputs and an impedance means associated with each switch for establishing the gain of the signals applied thereto; e. means supplying said information signal to a first group of said input switches for connecting said information signal to said noninverting amplifier input, means supplying the signal stored on said one storage device to a second group of said input switches for connecting said stored signal to the inverting amplifier input, and means supplying the signals stored in said other signal storage devices to a third group of said input switches for connecting said other stored signals to said noninverting amplifier input; and f. a programmed digital memory means for controlling said input and charge switches, said memory including a plurality of sequentially read digital words, each word including a plurality of word bits related in number to said plurality of switches and determining the state of said switches, said word sequence determining the sequential operations required for performing said filter function.
Claim 24
Dependent Claim
301 words
A sampled data computer for computing a general plural order filter function of an analog information signal comprising: a. a multiplexed high gain differential amplifier means having noninverting and inverting inputs, an output and a feedback impedance connected from said output to said inverting input for adding and subtracting analog signals applied to said inputs; b. a plurality of analog signal storage devices related in number to the order of the filter function to be performed, the signal stored on one of said storage devices constituting the output of said computer; c. a plurality of charge switches corresponding in number to the number of said storage means for coupling said amplifier output thereto; d. a plurality of input switches related in number to the order of the filter function to be performed for coupling signals applied thereto to said amplifier inputs and an impedance means associated with each switch for establishing the gain of the signals applied thereto; e. means supplying said information signal to a first group of said input switches for connecting said information signal to said noninverting amplifier input, means supplying the signal stored on said one storage device to a second group of said input switches for connecting said stored signal to the inverting amplifier input, and means supplying the signals stored in said other signal storage devices to a third group of said input switches for connecting said other stored signals to said noninverting amplifier input; and f. a programmed digital memory means for controlling said input and charge switches, said memory including a plurality of sequentially read digital words, each word including a plurality of word bits related in number to said plurality of switches and determining the state of said switches, said word sequence determining the sequential operations required for performing said filter function.
Claim 25
Dependent Claim
166 words
A sampled data computer for performing predetermined computations on analog information signals comprising: amplifier means having input means and an output; said input means being responsive to said analog information signals; a plurality of analog signal storage means responsive to said amplifier output; a plurality of switch means having conducting and nonconducting states for coupling said amplifier output to said signal storage means and for coupling said storage means back to said amplifier input means for combining the signals stored therein with said information signals; digital memory means connected to control said plurality of switch means in accordance with a predetermined program, said program comprising a plurality of sequential word instructions, each word comprising a plurality of bits corresponding to said plurality of switches for controlling the states of said switches, said program determining the computation to be performed on said analog information signal; and an output means coupled with at least one of said signal storage means and responsive to the resultant signal stored therein.
Claim 26
Dependent Claim
166 words
A sampled data computer for performing predetermined computations on analog information signals comprising: amplifier means having input means and an output; said input means being responsive to said analog information signals; a plurality of analog signal storage means responsive to said amplifier output; a plurality of switch means having conducting and nonconducting states for coupling said amplifier output to said signal storage means and for coupling said storage means back to said amplifier input means for combining the signals stored therein with said information signals; digital memory means connected to control said plurality of switch means in accordance with a predetermined program, said program comprising a plurality of sequential word instructions, each word comprising a plurality of bits corresponding to said plurality of switches for controlling the states of said switches, said program determining the computation to be performed on said analog information signal; and an output means coupled with at least one of said signal storage means and responsive to the resultant signal stored therein.
Claim 27
Dependent Claim
77 words
The sampled data computer as set forth in claim 15 wherein said plurality of switch means comprises: a plurality of output switch means having conducting and nonconducting states for selectively coupling said amplifier output to selected ones of said signal storage means; and a plurality of feedback switch means having conducting and nonconducting states for seLectively coupling said signal storage means back to said amplifier input means for combining the signals stored therein with said information signals.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-04-05 | 1974-10-05 | 1975-04-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-04-05 | 1978-10-05 | 1979-04-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-04-05 | 1982-10-05 | 1983-04-06 | $7700.00 | Window Closed / Lapsed |