Method for execution of jumps in an instruction memory of a computer

Claim 2

In a digital computer which includes storage means for storing a main program sequence of addressed instructions and at least a subroutine of addressed instructions, arithmetic means, an addressed return-address register, at least one addressed subroutine-address register for storing the starting address of the subroutine, an addressed constant register storing a constant and control means for sequencing the digital computer through series of instructions, the method of performing a jump routine from a first particular instruction of the main program sequence of instructions to the subroutine of instructions and of returning to a second particular instruction of the main program sequence of instructions upon completion of the subroutine of instructions, said method comprising the steps of storing as a part of said first particUlar instruction the address of the addressed constant register and a given number, storing as a part of the last instruction in the subroutine of instructions the address of the return-address register, initiating the digital computer to start performing the main sequence of instructions, at the occurrence of said first particular instruction fetching the contents of the addressed constant register indicated by the address stored as a part of said first particular instruction, adding the contents of the addressed constant register to the address of said first particular instruction to form the address of the subroutine-address register and subtracting said given number from the address of said first particular instruction to form the address of said second particular instruction of the main program sequence of instructions, storing the so formed address of said second particular instruction in said returnaddress register, utilizing the address formed by the sum of said first given number and the address of said first particular instruction to access the addressed subroutine-address register, locating the first instruction of the subroutine by means of the address stored in the addressed subroutine-address register, sequencing through the instructions of the subroutine to the last instruction, fetching the return-address stored in the returnaddress register whose address is included in the last instruction of the subroutine, and directing the control means to return to the second particular instruction of the main program sequence of instructions which is indicated by the address fetched from the return-address register.

Claim 3

The method of claim 1 wherein said storage means of said digital computer stores a plurality of subroutines of addressed instructions and said digital computer includes a plurality of addressed subroutine-address registers each storing the starting address of one of the subroutines, said method further comprising the step of modifying the constant stored in the addressed constant register during the performance of the main sequence of instructions.

Claim 4

Apparatus for performing a jump routine from a first particular instruction of a main program sequence of instructions to a subroutine of instructions and for returning to a second particular instruction of the main program sequence of instructions upon completion of the subroutine of instructions comprising an addressed storage means for storing the instructions of the main sequence of instructions in sequentially addressed registers and for storing the instructions of the subroutine of instructions in other sequentially addressed registers, a return-address register, an addressed subroutine-address register for storing the starting address of the subroutine of instructions, an addressed constant register for storing a constant, a first particular register of said addressed registers that store the main program sequence of instructions storing as a part of the first particular instruction the address of said addressed constant register and a given number, the last addressed register of the sequence of said addressed registers that store the subroutine of instructions storing the address of said return-address register, means for indicating the address of each instruction being performed, means operating in response to the first particular instruction for fetching the contents of said addressed constant register, arithmetic means for adding the contents of said addressed constant register to the address of the first particular instruction to form the address of said subroutine-address register and for subtracting said given number stored in said first particular register by the address of the first particular instruction to form the address of the register which stores the second particular instruction of the main program sequence of instructions, means for transferring the so formed address to said return-address register, means responsive to the address formed by the sum of said given number and the aDdress of said first particular register storing the first particular instruction to access the contents of said addressed subroutine-address register, means for obtaining the first instruction of the subroutine of instructions by utilizing the contents of said addressed subroutine-address register, means responsive to the contents of the register storing the last instruction of the subroutine of instructions to access said return-address register, and means responsive to the contents of said return-address register to access the register storing the second particular instruction of the main program sequence of instructions.

Claim 5

Apparatus for performing a jump routine from a first particular instruction of a main program sequence of instructions to a subroutine of instructions and for returning to a second particular instruction of the main program sequence of instructions upon completion of the subroutine of instructions comprising an addressed storage means for storing the instructions of the main sequence of instructions in sequentially addressed registers and for storing the instructions of the subroutine of instructions in other sequentially addressed registers, a return-address register, an addressed subroutine-address register for storing the starting address of the subroutine of instructions, an addressed constant register for storing a constant, a first particular register of said addressed registers that store the main program sequence of instructions storing as a part of the first particular instruction the address of said addressed constant register and a given number, the last addressed register of the sequence of said addressed registers that store the subroutine of instructions storing the address of said return-address register, means for indicating the address of each instruction being performed, means operating in response to the first particular instruction for fetching the contents of said addressed constant register, arithmetic means for adding the contents of said addressed constant register to the address of the first particular instruction to form the address of said subroutine-address register and for subtracting said given number stored in said first particular register by the address of the first particular instruction to form the address of the register which stores the second particular instruction of the main program sequence of instructions, means for transferring the so formed address to said return-address register, means responsive to the address formed by the sum of said given number and the aDdress of said first particular register storing the first particular instruction to access the contents of said addressed subroutine-address register, means for obtaining the first instruction of the subroutine of instructions by utilizing the contents of said addressed subroutine-address register, means responsive to the contents of the register storing the last instruction of the subroutine of instructions to access said return-address register, and means responsive to the contents of said return-address register to access the register storing the second particular instruction of the main program sequence of instructions.