US3571630A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Two-terminal monolithic voltage regulator and reach-through transistor
Assignee: National Semiconductor Corp
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Filing: 1968-11-04
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Granted: 1971-03-23
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Expires: 1988-11-04
Abstract
Abstract A double diffused transistor structure having a base region which is sufficiently thin so that the reverse breakdown voltage between the emitter and the collector (BVeco) is less than the reverse breakdown voltage between the emitter and the base (BVebo). The transistor structure is connected in an upside-down fashion as a two-terminal network, the terminals being formed by the emitter and the collector in a manner similar to that heretofore employed with Zener diodes to provide a ''''reachthrough'''' at a predetermined voltage thereacross. A circuit utilizing such a ''''reach-through'''' transistor structure connected in the upside-down fashion in conjunction with other components to operate the transistor structure at a constant current to maintain the reverse breakdown voltage constant.
Inventors
- 👤 Robert J Widlar
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 22:17
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/40; H10D84/401; H10D84/403; H10D84/406; G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/18; G05F3/185; H10D99/00
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
192 words
A two-terminal monolithic voltage regulator comprising: a first terminal and a second terminal across which a voltage to be regulated may be applied; a first transistor means including a first region and a second region of a first conductivity type separated by a third region of a second conductivity type, at least a portion of said third region being so thin that a depletion layer caused by reverse biasing the junction formed between said first region and said third region extends through said portion at a potential less than the avalanche breakdown potential of said junction, said first region being coupled to said first terminal; resistance means coupling said second region to said second terminal; and a second transistor means having a first base, a first emitter and a first collector, said first emitter being coupled to one of said first and second terminals, said first collector being coupled to the other of said first and second terminals and said first base being coupled to said second region of said first transistor means, said second transistor means being responsive to the current flow through said first transistor means to regulate said voltage.
Claim 2
Dependent Claim
192 words
A two-terminal monolithic voltage regulator comprising: a first terminal and a second terminal across which a voltage to be regulated may be applied; a first transistor means including a first region and a second region of a first conductivity type separated by a third region of a second conductivity type, at least a portion of said third region being so thin that a depletion layer caused by reverse biasing the junction formed between said first region and said third region extends through said portion at a potential less than the avalanche breakdown potential of said junction, said first region being coupled to said first terminal; resistance means coupling said second region to said second terminal; and a second transistor means having a first base, a first emitter and a first collector, said first emitter being coupled to one of said first and second terminals, said first collector being coupled to the other of said first and second terminals and said first base being coupled to said second region of said first transistor means, said second transistor means being responsive to the current flow through said first transistor means to regulate said voltage.
Claim 3
Dependent Claim
56 words
A two-terminal monolithic voltage regulator as recited in claim 1 wherein said resistance means includes a field effect transistor having a gate, a source and a drain, said gate being coupled to one of said first and second terminals, said source being coupled to said second terminal and said drain being coupled to said second region.
Claim 4
Dependent Claim
69 words
A two-terminal monolithic voltage regulator as recited in claim 2 and further including a third transistor means having a second base, a second emitter and a second collector, said second emitter being coupled to one of said first and second terminals, said second collector being coupled to the other of said first and second terminals and said second base being responsive to the output of said second transistor means.
Claim 5
Dependent Claim
22 words
A two-terminal monolithic voltage regulator as recited in claim 3 and further including means coupling said third region to said second terminal.
Claim 6
Dependent Claim
175 words
A two-terminal voltage regulator comprising: a first terminal and a second terminal across which a voltage to be regulated may be applied; a first transistor means including a first emitter and a first collector separated by a first base, and defining a first PN junction between said first emitter and said first base, and a second PN junction between said first base and said first collector, the thickness of said base separating said first and second junctions being so small that a depletion layer caused by reverse biasing said first junction extends to said second junction at a biasing potential less than that required to cause avalanche breakdown across said first junction, said first emitter being coupled to said first terminal; resistance means coupling said first collector to said second terminal; and a second transistor means including a second base, a second emitter and a second collector, said second base being coupled to said first collector, said second collector being coupled to said first terminal and said second emitter being coupled to said second terminal.
Claim 7
Dependent Claim
175 words
A two-terminal voltage regulator comprising: a first terminal and a second terminal across which a voltage to be regulated may be applied; a first transistor means including a first emitter and a first collector separated by a first base, and defining a first PN junction between said first emitter and said first base, and a second PN junction between said first base and said first collector, the thickness of said base separating said first and second junctions being so small that a depletion layer caused by reverse biasing said first junction extends to said second junction at a biasing potential less than that required to cause avalanche breakdown across said first junction, said first emitter being coupled to said first terminal; resistance means coupling said first collector to said second terminal; and a second transistor means including a second base, a second emitter and a second collector, said second base being coupled to said first collector, said second collector being coupled to said first terminal and said second emitter being coupled to said second terminal.
Claim 8
Dependent Claim
49 words
A two-terminal voltage regulator as recited in claim 5 wherein said resistance means includes a field effect transistor having a gate, source and drain, said gate being coupled to said first terminal, said drain being coupled to said first collector and said source being coupled to said second terminal.
Claim 9
Dependent Claim
55 words
A two-terminal voltage regulator as recited in claim 6 and further including a third transistor means having a third base, a third emitter and a third collector, said third base being coupled to said second collector, said third emitter being coupled to said first terminal and said third collector being coupled to said second terminal.
Claim 10
Dependent Claim
36 words
A two-terminal voltage regulator as recited in claim 7 wherein said first transistor means and said second transistor means are of a first conductivity type and said third transistor means is of the opposite conductivity type.
Claim 11
Dependent Claim
21 words
A two-teRminal voltage regulator as recited in claim 6 and further including means coupling said first base to said second terminal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-03-22 | 1974-09-21 | 1975-03-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-03-22 | 1978-09-21 | 1979-03-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-03-22 | 1982-09-21 | 1983-03-23 | $7700.00 | Window Closed / Lapsed |