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US3571584A Expired / Lapsed US ⏱️ 0.0 years remaining

Funicular diagram generator for generating an automatic graphical display of a first variable as a function of a second variable

Assignee: Oklahoma State University
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Filing: 1969-06-23
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Granted: 1971-03-23
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Expires: 1989-06-23
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Abstract

Abstract This invention provides a funicular diagram generator. More particularly, the invention relates to a funicular diagram generator for use as an interface between a source medium having the form of a stepwise addressable sequential channel output of analogue signal samples and a recording medium in the form of a graph tracer having separate horizontal and vertical analogue deflection signal inputs, the generator providing means of graphically plotting and displaying the analogue signal samples in the form of a continuous funicular diagram consisting of adjacent connected straight-line segments joining adjacent data points having equally spaced abscissas. The funicular diagram generator includes a first and second sample-and-hold circuit means, a summing amplifier receiving the output of the sampleand-hold means, an analogue integrator receiving the output of the summing amplifier and the source medium analogue output signal and a means of sequentially stepping the source medium and the sample-and-hold circuit means in time relationed sequential steps to provide at the output of the analogue integrator a composite signal functioning as the vertical analogue signal which may be impressed on the horizontal and vertical inputs of the graph tracer to provide a funicular diagram display.

Inventors

  • 👤 Victor W Bolie

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 22:38
CPC Classifications
G; G06; G06G; G06G7/00; G06G7/12; G06G7/26; G06G7/28; G01; G01R; G01R17/00

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 533 words
A funicular diagram generator for use as an interface between a source medium having the form of a stepwise addressable sequential channel output of analogue signal samples and a recording medium in the form of a graph tracer having separate horizontal and vertical analogue deflection signal inputs, the generator providing means of graphically plotting and displaying said analogue signal samples in the form of a continuous funicular diagram consisting of adjacently connected straightline segments joining adjacent data points having equally spaced abscissas, said diagram generator comprising: a first and second sample-and-hold circuit means each having an analogue signal output, an analogue signal input, and a sampleand-hold command signal input, the analogue signal input of said first sample-and-hold circuit being connected to said source medium analogue signal output; a summing ampLifier having a first and second analogue signal input and a summation signal output, the internal feedback resistance and input resistances of said summing amplifier being such that the summation signal output is equal to the algebraic negative of one-half of the algebraic sum of the two analogue input signals, the output of said first sample-andhold circuit means being connected to said first summing amplifier signal input and in like manner, the output of said second sample-and-hold circuit means being connected to said second summing amplifier input, the output of said first sample-and-hold circuit means being also connected to said second sample-and-hold circuit analogue input; an analogue integrator having an analogue signal input connected to the output of said summing amplifier, an initial condition reset signal input, a reset level signal input connected to said source analogue signal output, and an integrated signal output connected to said graph tracer vertical signal input; means of sequentially stepping said source medium to provide at each channel a sample analogue signal to said first sample-andhold circuit and simultaneously to said analogue integrator analogue signal input; means of sequentially imparting the analogue signal sample held by said first sample-and-hold circuit to said summing amplifier and concurrently imparting the analogue signal sample held by said second sample-and-hold circuit to said summing amplifier whereby the output of said summing amplifier is the algebraic negative of one-half of the algebraic sum of the two said input analogue signals; means of actuating said analogue integrator to provide at the output thereof an analogue vertical deflection signal which changes away from its automatically preset initial level at a rate which is algebraically proportional to the analogue signal voltage of said summing amplifier which said analogue signal output is fed to said recording medium vertical deflection input; means of applying a linearly changing analogue deflection signal to said recording medium horizontal input in synchronization with the sequential stepping of said source medium; and means following the actuation of said analogue integrator to transfer the analogue signal held by said first sample-and-hold circuit to said second sample-and-hold circuit and subsequently to step said source medium to the next adjacent sequential channel to provide at said summing amplifier output, for each channel, an analogue signal voltage level equal to the algebraic negative of one-half the algebraic sum of that channel step sampled analogue signal voltage plus the analogue signal voltage of the sampled preceding channel step.
Claim 2
Dependent Claim 533 words
A funicular diagram generator for use as an interface between a source medium having the form of a stepwise addressable sequential channel output of analogue signal samples and a recording medium in the form of a graph tracer having separate horizontal and vertical analogue deflection signal inputs, the generator providing means of graphically plotting and displaying said analogue signal samples in the form of a continuous funicular diagram consisting of adjacently connected straightline segments joining adjacent data points having equally spaced abscissas, said diagram generator comprising: a first and second sample-and-hold circuit means each having an analogue signal output, an analogue signal input, and a sampleand-hold command signal input, the analogue signal input of said first sample-and-hold circuit being connected to said source medium analogue signal output; a summing ampLifier having a first and second analogue signal input and a summation signal output, the internal feedback resistance and input resistances of said summing amplifier being such that the summation signal output is equal to the algebraic negative of one-half of the algebraic sum of the two analogue input signals, the output of said first sample-andhold circuit means being connected to said first summing amplifier signal input and in like manner, the output of said second sample-and-hold circuit means being connected to said second summing amplifier input, the output of said first sample-and-hold circuit means being also connected to said second sample-and-hold circuit analogue input; an analogue integrator having an analogue signal input connected to the output of said summing amplifier, an initial condition reset signal input, a reset level signal input connected to said source analogue signal output, and an integrated signal output connected to said graph tracer vertical signal input; means of sequentially stepping said source medium to provide at each channel a sample analogue signal to said first sample-andhold circuit and simultaneously to said analogue integrator analogue signal input; means of sequentially imparting the analogue signal sample held by said first sample-and-hold circuit to said summing amplifier and concurrently imparting the analogue signal sample held by said second sample-and-hold circuit to said summing amplifier whereby the output of said summing amplifier is the algebraic negative of one-half of the algebraic sum of the two said input analogue signals; means of actuating said analogue integrator to provide at the output thereof an analogue vertical deflection signal which changes away from its automatically preset initial level at a rate which is algebraically proportional to the analogue signal voltage of said summing amplifier which said analogue signal output is fed to said recording medium vertical deflection input; means of applying a linearly changing analogue deflection signal to said recording medium horizontal input in synchronization with the sequential stepping of said source medium; and means following the actuation of said analogue integrator to transfer the analogue signal held by said first sample-and-hold circuit to said second sample-and-hold circuit and subsequently to step said source medium to the next adjacent sequential channel to provide at said summing amplifier output, for each channel, an analogue signal voltage level equal to the algebraic negative of one-half the algebraic sum of that channel step sampled analogue signal voltage plus the analogue signal voltage of the sampled preceding channel step.
Claim 3
Dependent Claim 36 words
A funicular diagram generator according to claim 1 wherein said recording medium includes a blanking signal input and including means providing a blanking signal thereto in synchronization with said means of sequentially stepping said source medium.
Claim 4
Dependent Claim 57 words
A funicular diagram generator according to claim 1 wherein said source medium includes an address stepper signal input and wherein said means of sequentially stepping said source medium includes means providing a digital stepper signal in synchronization with and in time governed relationship to said means of actuating said analogue integrator to provide said vertical deflection signal.
Claim 5
Dependent Claim 91 words
A funicular diagram generator according to claim 1 wherein said source medium includes a ready to read signal output providing a digital signal as said source medium is conditioned to each succeeding channel and including: sequential time delay circuit means actuated by said ready to read signal from said source medium, said sequential time delay circuit means including means of sequentially providing digital signal inputs to said sample-and-hold command signal inputs to cause said sample-and-hold circuit means to actuate in time spaced synchronization with the sequential advancement of said source medium.

References Cited (Backward Citations)

US3373273A Cited
US3524978A Cited
US3513301A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-03-22 1974-09-21 1975-03-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-03-22 1978-09-21 1979-03-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-03-22 1982-09-21 1983-03-23 $7700.00 Window Closed / Lapsed

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