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US3571580A Expired / Lapsed US ⏱️ 0.0 years remaining

Device for determining least significant {37 one{38 {0 in a binary word

Assignee: Nortel Networks Ltd
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Filing: 1969-02-06
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Granted: 1971-03-23
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Expires: 1989-02-06
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Abstract

Abstract The position of the least or most significant ONE-bit in a binary word is determined by adding the binary word to another binary word of the same length but consisting of all ONE-bits. The carry bits which are generated in the addition are complemented and ANDED with the original word to result in a binary word consisting of all ZERO-bits except for a ONE-bit at the position of the least significant bit in the original binary word.

Inventors

  • 👤 John S Buchan
  • 👤 Leonard C Beaumont

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 00:34
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/74; H; H04; H04Q; H04Q3/00; H04Q3/42; H04Q3/54; H04Q3/545

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 133 words
A logical device for determining the position of the least significant 1-bit in a binary word consisting of 1-bits and/or 0bits comprising: a. an adding means for adding a first binary word and a second binary word of the same length as said first word but consisting of all 1-bits to produce a third binary word consisting of carry bits; b. a complementing means connected to the adding means for complementing the third binary word to produce a fourth binary word; c. an ANDING means connected to the complementing means for ANDING the fourth binary word and the first binary word to produce a fifth binary word consisting of all 0-bits except for a 1-bit at the bit position corresponding to the position of the least significant 1-bit in the first binary word.
Claim 2
Dependent Claim 133 words
A logical device for determining the position of the least significant 1-bit in a binary word consisting of 1-bits and/or 0bits comprising: a. an adding means for adding a first binary word and a second binary word of the same length as said first word but consisting of all 1-bits to produce a third binary word consisting of carry bits; b. a complementing means connected to the adding means for complementing the third binary word to produce a fourth binary word; c. an ANDING means connected to the complementing means for ANDING the fourth binary word and the first binary word to produce a fifth binary word consisting of all 0-bits except for a 1-bit at the bit position corresponding to the position of the least significant 1-bit in the first binary word.
Claim 3
Dependent Claim 230 words
A logical device for determining the position of the least significant 1-bit in a binary word, consisting of 1-bits and/or 0-bits comprising: a. an adding means having first and second input ports and a first output port, for adding a first binary word and a second binary word of the same length as said first word but consisting of all 1-bits which may appear respectively at said input ports, and for producing at the first output port a third binary word consisting of carry bits, one carry bit corresponding to each bit position of the first binary word; b. A complementing means having a third input port to which the third binary word may be applied, for complementing the third binary word to form a fourth binary word, and having a second output port at which the fourth binary word may appear; c. An ANDING means having a fourth input port to which the fourth binary word may be applied, a fifth input port to which the first binary word may be applied, and a third output port, for ANDING the first and fourth binary words to form a fifth binary word which may appear at the third output port, said fifth binary word consisting of all 0-bits except for a 1-bits at the bit position corresponding to the position of the least significant 1-bit in the first binary word.
Claim 4
Dependent Claim 230 words
A logical device for determining the position of the least significant 1-bit in a binary word, consisting of 1-bits and/or 0-bits comprising: a. an adding means having first and second input ports and a first output port, for adding a first binary word and a second binary word of the same length as said first word but consisting of all 1-bits which may appear respectively at said input ports, and for producing at the first output port a third binary word consisting of carry bits, one carry bit corresponding to each bit position of the first binary word; b. A complementing means having a third input port to which the third binary word may be applied, for complementing the third binary word to form a fourth binary word, and having a second output port at which the fourth binary word may appear; c. An ANDING means having a fourth input port to which the fourth binary word may be applied, a fifth input port to which the first binary word may be applied, and a third output port, for ANDING the first and fourth binary words to form a fifth binary word which may appear at the third output port, said fifth binary word consisting of all 0-bits except for a 1-bits at the bit position corresponding to the position of the least significant 1-bit in the first binary word.
Claim 5
Dependent Claim 55 words
A logical device as defined in claim 2, further comprising: a. first means for applying the first binary word to the first and fifth input ports; and b. means for applying the second binary word of the same bit length as the first binary word but consisting of all 1-bits, to the second input port.
Claim 6
Independent Claim 178 words
The method for determining the position of the least significant 1-bit in a first binary word consisting of 1-bits and/or 0-bits, in a logical device, comprising the steps of: a. applying the first binary word to a first input port of an adding means; b. applying a second binary word of the same length as the first binary word, but consisting of all 1-bits, to a second input port of an adding means; c. adding the first binary word to the second binary word in the adding means, resulting in the generation of a third binary word consisting of carry bits, one carry bit corresponding to each bit position of the first binary word; d. complementing the third binary word in a complementing means to obtain a fourth binary word; and e. ANDING the first binary word with the fourth binary word in an ANDING means, resulting in the fifth binary word consisting of all 0-bits except for a 1-bit at the bit position corresponding to the position of the least significant 1-bit in the first binary word.
Claim 7
Independent Claim 178 words
The method for determining the position of the least significant 1-bit in a first binary word consisting of 1-bits and/or 0-bits, in a logical device, comprising the steps of: a. applying the first binary word to a first input port of an adding means; b. applying a second binary word of the same length as the first binary word, but consisting of all 1-bits, to a second input port of an adding means; c. adding the first binary word to the second binary word in the adding means, resulting in the generation of a third binary word consisting of carry bits, one carry bit corresponding to each bit position of the first binary word; d. complementing the third binary word in a complementing means to obtain a fourth binary word; and e. ANDING the first binary word with the fourth binary word in an ANDING means, resulting in the fifth binary word consisting of all 0-bits except for a 1-bit at the bit position corresponding to the position of the least significant 1-bit in the first binary word.

References Cited (Backward Citations)

US3414720A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-03-22 1974-09-21 1975-03-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-03-22 1978-09-21 1979-03-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-03-22 1982-09-21 1983-03-23 $7700.00 Window Closed / Lapsed

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