Patent US4490113A successfully refreshed from Google Patents.
US3569745A
Expired / Lapsed
US
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Transistor logic circuit
Assignee: GTE Sylvania Inc
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Filing: 1968-11-06
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Granted: 1971-03-09
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Expires: 1988-11-06
Abstract
Abstract Bistable transistor-transistor logic circuit in which the turnon and turnoff times of a saturated output transistor are decreased by the operation of a bypass circuit which diverts a portion of the output transistor driving current away from the transistor after it has been driven into saturation. The bistable logic circuit is triggered from one state to the other by a clock pulse applied to a control circuit having an input transistor connected directly to the clock pulse terminal and to a capacitance. During the clock pulse the input transistor conducts and charges the capacitance. Upon termination of the clock pulse the stored charge is employed to initiate switching.
Inventors
- 👤 John J Kardash
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 16:44
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/26; H03K3/28; H03K3/281; H03K3/286; H03K3/289; H03K19/00; H03K19/02; H03K19/08; H03K19/082; H03K19/088; H03K3/287; H03K3/288; H03K3/2885
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
767 words
A bistable circuit including in combination: a first flip-flop element having a first operating condition and a second operating condition; a second flip-flop element having a first operating condition and a second operating condition; feedback connections between the first and second flip-flop elements for causing the flip-flop elements to operate in different operating conditions; a first driving circuit means including an input connection connected to the first flip-flop element and having a low conduction condition and a high conduction condition, said first driving circuit means being operable in the high conduction condition when the first flip-flop element is in the first operating condition and being operable in the low conduction condition when the first flip-flop element is in the second operating condition; a first output circuit means having an input connection connected to the first driving circuit means and having a low conduction condition and a high conduction condition, said first output circuit means being operable in the high conduction condition in response to a predetermined amount of driving current and being operable in the low conduction condition in response to less than the predetermined amount of driving current; said first driving circuit means being operable when in the high conduction condition to supply in excess of the predetermined amount of driving current to the first output circuit means to cause the first output circuit means to operate in the high conduction condition, and being operable when in the low conduction condition to supply less than the predetermined amount of driving current; first bypass circuit means connected to the input connection of the first output circuit means and operable when in a first condition to divert a portion of the current in excess of the predetermined amount of driving current flowing from the first driving circuit means away from the first output circuit means, and operable when in a second condition to permit current flowing from the first driving circuit means in excess of the predetermined amount of driving current to flow into the first output circuit means; a second driving circuit means including an input connection connected to the second flip-flop element and having a low conduction condition and a high conduction condition, said second driving circuit means being operable in the high conduction condition when the second flip-flop element is in the first operating condition and being operable in the low conduction condition when the second flip-flop element is in the second operating condition; a second output circuit means having an input connection connected to the second driving circuit means and having a low conduction condition and a high conduction condition, said second output circuit means being operable in the high conduction condition in response to a predetermined amount of driving current and being operable in the low conduction condition in response to less than the predetermined amount of driving current; said second driving circuit means being operable when in the high conduction condition to supply in excess of the predetermined amount of driving current to the second output circuit means to cause the second output circuit means to operate in the high conduction condition, and being operable when in the low conduction condition to supply less than the predetermined amount of driving current; second bypass circuit means connected to the input connection of the second output circuit means and operable when in a first condition to divert a portion of the current in excess of the predetermined amount of driving current flowing from the second driving circuit means away from the second output circuit means, and operable when in a second condition to permit currenT flowing from the second driving circuit means in excess of the predetermined amount of driving current to flow into the second output circuit means; first biasing means connected to the first bypass circuit means and coupled to the second flip-flop element, said first biasing means being operable to cause the first bypass circuit means to operate in the first condition when the second flip-flop element is in the second operating condition and to cause the first bypass circuit means to operate in the second condition when the second flip-flop element is in the first operating condition; and second biasing means connected to the second bypass circuit means and coupled to the first flip-flop element, said second biasing means being operable to cause the second bypass circuit means to operate in the first condition when the first flipflop element is in the second operating condition and to cause the second bypass circuit means to operate in the second condition when the first flip-flop element is in the first operating condition.
Claim 2
Dependent Claim
767 words
A bistable circuit including in combination: a first flip-flop element having a first operating condition and a second operating condition; a second flip-flop element having a first operating condition and a second operating condition; feedback connections between the first and second flip-flop elements for causing the flip-flop elements to operate in different operating conditions; a first driving circuit means including an input connection connected to the first flip-flop element and having a low conduction condition and a high conduction condition, said first driving circuit means being operable in the high conduction condition when the first flip-flop element is in the first operating condition and being operable in the low conduction condition when the first flip-flop element is in the second operating condition; a first output circuit means having an input connection connected to the first driving circuit means and having a low conduction condition and a high conduction condition, said first output circuit means being operable in the high conduction condition in response to a predetermined amount of driving current and being operable in the low conduction condition in response to less than the predetermined amount of driving current; said first driving circuit means being operable when in the high conduction condition to supply in excess of the predetermined amount of driving current to the first output circuit means to cause the first output circuit means to operate in the high conduction condition, and being operable when in the low conduction condition to supply less than the predetermined amount of driving current; first bypass circuit means connected to the input connection of the first output circuit means and operable when in a first condition to divert a portion of the current in excess of the predetermined amount of driving current flowing from the first driving circuit means away from the first output circuit means, and operable when in a second condition to permit current flowing from the first driving circuit means in excess of the predetermined amount of driving current to flow into the first output circuit means; a second driving circuit means including an input connection connected to the second flip-flop element and having a low conduction condition and a high conduction condition, said second driving circuit means being operable in the high conduction condition when the second flip-flop element is in the first operating condition and being operable in the low conduction condition when the second flip-flop element is in the second operating condition; a second output circuit means having an input connection connected to the second driving circuit means and having a low conduction condition and a high conduction condition, said second output circuit means being operable in the high conduction condition in response to a predetermined amount of driving current and being operable in the low conduction condition in response to less than the predetermined amount of driving current; said second driving circuit means being operable when in the high conduction condition to supply in excess of the predetermined amount of driving current to the second output circuit means to cause the second output circuit means to operate in the high conduction condition, and being operable when in the low conduction condition to supply less than the predetermined amount of driving current; second bypass circuit means connected to the input connection of the second output circuit means and operable when in a first condition to divert a portion of the current in excess of the predetermined amount of driving current flowing from the second driving circuit means away from the second output circuit means, and operable when in a second condition to permit currenT flowing from the second driving circuit means in excess of the predetermined amount of driving current to flow into the second output circuit means; first biasing means connected to the first bypass circuit means and coupled to the second flip-flop element, said first biasing means being operable to cause the first bypass circuit means to operate in the first condition when the second flip-flop element is in the second operating condition and to cause the first bypass circuit means to operate in the second condition when the second flip-flop element is in the first operating condition; and second biasing means connected to the second bypass circuit means and coupled to the first flip-flop element, said second biasing means being operable to cause the second bypass circuit means to operate in the first condition when the first flipflop element is in the second operating condition and to cause the second bypass circuit means to operate in the second condition when the first flip-flop element is in the first operating condition.
Claim 3
Dependent Claim
152 words
A bistable circuit in accordance with claim 1 wherein: said first bypass circuit means includes means providing a low impedance between the input connection of the first output circuit means and a first source of reference potential when the first bypass circuit means is in the first condition and a high impedance between the input connection of the first output circuit means and the first source of reference potential when the first bypass circuit means is in the second condition; and said second bypass circuit means includes means providing a low impedance between the input connection of the second output circuit means and the first source of reference potential when the second bypass circuit means is in the first condition and a high impedance between the input connection of the second output circuit means and the first source of reference potential when the second bypass circuit means is in the second condition.
Claim 4
Dependent Claim
272 words
A bistable circuit in accordance with claim 2 wherein: said first bypass circuit means includes a first bypass transistor connected between the input connection of the first output circuit means and the first source of reference potential, said first bypass transistor being in a high conduction condition when the first bypass circuit means is in the first condition and being in a low conduction condition when the first bypass circuit means is in the second condition; said second bypass circuit means includes a second bypass transistor connected between the input connection of the second output circuit means and the first source of reference potential, said second bypass transistor being in a high conduction condition when the second bypass circuit means is in the first condition and being in a low conduction condition when the second bypass circuit means is in the second condition; said first biasing means is connected to the second output circuit means and being operable to bias the first bypass transistor to the high conduction condition when the second output circuit means is in the low conduction condition and being operable to bias the first bypass transistor to the low conduction condition when the second output circuit means is in the high conduction condition; and said second biasing means is connected to the first output circuit means and being operable to bias the second bypass transistor to the high conduction condition when the first output circuit means is in the low conduction condition and being operable to bias the second bypass transistor to the low conduction condition when the first output circuit means is in the high conduction condition.
Claim 5
Dependent Claim
210 words
A bistable circuit in accordance with claim 3 wherein: said first driving circuit means includes a first driving transistor operable in a high conduction condition when the first flip-flop element is in the first operating condition and operable in a low conduction condition when the first flip-flop element is in thE second operating condition; said first output circuit means includes a first output transistor operable in a high conduction condition in response to a predetermined amount of driving current from the first driving circuit means and operable in a low conduction condition in response to less than the predetermined amount of driving current from the first driving circuit means; said second driving circuit means includes a second driving transistor operable in a high conduction condition when the second flip-flop element is in the first operating condition and operable in a low conduction condition when the second flip-flop element is in the second operating condition; and said second output circuit means includes a second output transistor operable in a high conduction condition in response to a predetermined amount of driving current from the second driving circuit means and operable in a low conduction condition in response to less than the predetermined amount of driving current from the second driving circuit means.
Claim 6
Dependent Claim
218 words
A bistable circuit in accordance with claim 4 wherein: said first driving transistor has its base connected to the input connection of the first driving circuit means and its collector connected to a second source of reference potential; said first output transistor has its base connected to the emitter of the first driving transistor, its collector connected to the second source of reference potential, and its emitter connected to the first source of reference potential; said second driving transistor has its base connected to the input connection of the second driving circuit means and its collector connected to the second source of reference potential; said second output transistor has its base connected to the emitter of the second driving transistor, its collector connected to the second source of reference potential, and its emitter connected to the first source of reference potential; said first bypass transistor has its collector connected to the emitter of the first driving transistor, its emitter connected to the first source of reference potential, and its base connected to the collector of the second output transistor; and said second bypass transistor has its collector connected to the emitter of the second driving transistor, its emitter connected to the first source of reference potential, and its base connected to the collector of the first output transistor.
Claim 7
Dependent Claim
355 words
A control circuit for providing a signal to a circuit means to change the operating state of the circuit means including in combination: a signal input connection; an output connection from the control circuit to said circuit means for transmitting a signal to change the state of the circuit means; an input connection to the control circuit from said circuit means for transmitting a signal indicative of the state of the circuit means; a charge storage device; signal input means including a signal input transistor having its emitter connected to the charge storage device, its collector connected to the signal input connection, and its base connected to a first source of reference potential, said signal input means being operable when in a high conduction condition to cause a charge to be stored in the charge storage device; control means connected to the input connection from said circuit means and to the base of the signal input transistor, said control means being operable in a first condition in response to a first signal condition at the input connection from said circuit means and in a second condition in response to a second signal condition at the input connection from said circuit means; said signal input means being operable in a low conduction condition in the absence of an input signal at the signal input connection, being operable in the low conduction condition when the control means is in the second condition, and being operable in the high conduction condition during the presenCe of an input signal at the signal input connection while the control means is in the first condition; and switching means connecting the charge storage device to the output connection to said circuit means and operable to prevent the occurrence of a signal at the output connection during the presence of an input signal at said signal input connection and operable to employ the charge stored in the charge storage device to produce a signal at the output connection to said circuit means for changing the state of the circuit means in response to termination of the input signal at said signal input connection.
Claim 8
Dependent Claim
355 words
A control circuit for providing a signal to a circuit means to change the operating state of the circuit means including in combination: a signal input connection; an output connection from the control circuit to said circuit means for transmitting a signal to change the state of the circuit means; an input connection to the control circuit from said circuit means for transmitting a signal indicative of the state of the circuit means; a charge storage device; signal input means including a signal input transistor having its emitter connected to the charge storage device, its collector connected to the signal input connection, and its base connected to a first source of reference potential, said signal input means being operable when in a high conduction condition to cause a charge to be stored in the charge storage device; control means connected to the input connection from said circuit means and to the base of the signal input transistor, said control means being operable in a first condition in response to a first signal condition at the input connection from said circuit means and in a second condition in response to a second signal condition at the input connection from said circuit means; said signal input means being operable in a low conduction condition in the absence of an input signal at the signal input connection, being operable in the low conduction condition when the control means is in the second condition, and being operable in the high conduction condition during the presenCe of an input signal at the signal input connection while the control means is in the first condition; and switching means connecting the charge storage device to the output connection to said circuit means and operable to prevent the occurrence of a signal at the output connection during the presence of an input signal at said signal input connection and operable to employ the charge stored in the charge storage device to produce a signal at the output connection to said circuit means for changing the state of the circuit means in response to termination of the input signal at said signal input connection.
Claim 9
Dependent Claim
110 words
A control circuit in accordance with claim 6 wherein: said control means includes a control transistor having its base connected to the input connection from said circuit means and its collector connected to the base of the signal input transistor, said control transistor being operable in a low conduction condition when the first signal condition is present at the input connection from said circuit means and being operable in a high conduction condition when the second signal condition is present at the input connection from said circuit means; and said signal input transistor being biased to the low conduction condition when the control transistor is in the high conduction condition.
Claim 10
Dependent Claim
96 words
A control circuit in accordance with claim 7 further including: discharging means including a discharging transistor, said discharging transistor being connected in shunt across the charge storage device and having its base connected to the input connection from said circuit means, said discharging transistor being biased to a low conduction condition when the first signal condition is present on the input connection from said circuit means and being biased to a high conduction condition when the second signal condition is present on the output connection from the circuit means whereby the charge storage device is discharged.
Claim 11
Dependent Claim
733 words
A bistable circuit including in combination: a first flip-flop section having a first operating condition and a second operating condition; a second flip-flop section having a first operating condition and a second operating condition; feedback connections between the first and the second flip-flop sections for causing the flip-flop sections to operate in different operating conditions; a control circuit having control input connections from the first and second flip-flop sections and output connections to the first and second flip-flop sections; a first charge storage device in said control circuit; a signal input terminal connected to the control circuit; first signal input means in said control circuit including a first signal input transistor having its emitter connected to the first charge storage device, its collector connected to the signal input terminal, and its base connected to a first source of reference potential, said first signal input means being operable when in a high conduction condition to cause a charge to be stored in the first charge storage device; first control means in said control circuit connected to a control input connection and to the base of the first signal input transistor, said first control means being operable in a first condition when the first flip-flop section is in the first operating condition and the second flip-flop section is in the second operating condition and being operable in a second condition when the first flip-flop section is in the second operating condition and the second flip-flop section is in the first operating condition; said first signal input means being operable in a low conduction condition in the absence of an input signal at the signal input terminal, being operable in the low conduction condition when the first control means is in the second condition, and being operable in the high conduction condition during the presence of an input signal at the signal input terminal while the first control means is in the firSt condition; first switching means in said control circuit connecting the first charge storage device to an output connection and operable to prevent the occurrence of a signal at the output connection during the presence of an input signal at said signal input terminal and operable in response to termination of the input signal at said signal input terminal to employ the charge stored in the first charge storage device to trigger the first flip-flop section to the second operating condition and the second flip-flop section to the first operating condition; a second charge storage device in said control circuit; second signal input means in said control circuit including a second signal input transistor having its emitter connected to the second charge storage device, its collector connected to the signal input terminal, and its base connected to the first source of reference potential, said second signal input means being operable when in a high conduction condition to cause a charge to be stored in the second charge storage device; second control means in said control circuit connected to a control input connection and to the base of the second signal input transistor, said second control means being operable in a first condition when the first flip-flop section is in the second operating condition and the second flip-flop section is in the first operating condition and being operable in a second condition when the first flip-flop section is in the first operating condition and the second flip-flop section is in the second operating condition; said second signal input means being operable in a low conduction condition in the absence of an input signal at the signal input terminal, being operable in the low conduction condition when the second control means is in the second condition, and being operable in the high conduction condition during the presence of an input signal at the signal input terminal while the second control means is in the first condition; and second switching means in said control circuit connecting the second charge storage device to an output connection and operable to prevent the occurrence of a signal at the output connection during the presence of an input signal at said signal input terminal and operable in response to termination of the input signal at said signal input terminal to employ the charge stored in the second charge storage device to trigger the second flip-flop section to the second operating condition and the first flip-flop section to the first operating condition.
Claim 12
Dependent Claim
733 words
A bistable circuit including in combination: a first flip-flop section having a first operating condition and a second operating condition; a second flip-flop section having a first operating condition and a second operating condition; feedback connections between the first and the second flip-flop sections for causing the flip-flop sections to operate in different operating conditions; a control circuit having control input connections from the first and second flip-flop sections and output connections to the first and second flip-flop sections; a first charge storage device in said control circuit; a signal input terminal connected to the control circuit; first signal input means in said control circuit including a first signal input transistor having its emitter connected to the first charge storage device, its collector connected to the signal input terminal, and its base connected to a first source of reference potential, said first signal input means being operable when in a high conduction condition to cause a charge to be stored in the first charge storage device; first control means in said control circuit connected to a control input connection and to the base of the first signal input transistor, said first control means being operable in a first condition when the first flip-flop section is in the first operating condition and the second flip-flop section is in the second operating condition and being operable in a second condition when the first flip-flop section is in the second operating condition and the second flip-flop section is in the first operating condition; said first signal input means being operable in a low conduction condition in the absence of an input signal at the signal input terminal, being operable in the low conduction condition when the first control means is in the second condition, and being operable in the high conduction condition during the presence of an input signal at the signal input terminal while the first control means is in the firSt condition; first switching means in said control circuit connecting the first charge storage device to an output connection and operable to prevent the occurrence of a signal at the output connection during the presence of an input signal at said signal input terminal and operable in response to termination of the input signal at said signal input terminal to employ the charge stored in the first charge storage device to trigger the first flip-flop section to the second operating condition and the second flip-flop section to the first operating condition; a second charge storage device in said control circuit; second signal input means in said control circuit including a second signal input transistor having its emitter connected to the second charge storage device, its collector connected to the signal input terminal, and its base connected to the first source of reference potential, said second signal input means being operable when in a high conduction condition to cause a charge to be stored in the second charge storage device; second control means in said control circuit connected to a control input connection and to the base of the second signal input transistor, said second control means being operable in a first condition when the first flip-flop section is in the second operating condition and the second flip-flop section is in the first operating condition and being operable in a second condition when the first flip-flop section is in the first operating condition and the second flip-flop section is in the second operating condition; said second signal input means being operable in a low conduction condition in the absence of an input signal at the signal input terminal, being operable in the low conduction condition when the second control means is in the second condition, and being operable in the high conduction condition during the presence of an input signal at the signal input terminal while the second control means is in the first condition; and second switching means in said control circuit connecting the second charge storage device to an output connection and operable to prevent the occurrence of a signal at the output connection during the presence of an input signal at said signal input terminal and operable in response to termination of the input signal at said signal input terminal to employ the charge stored in the second charge storage device to trigger the second flip-flop section to the second operating condition and the first flip-flop section to the first operating condition.
Claim 13
Dependent Claim
244 words
A bistable circuit in accordance with claim 9 wherein: said first control means includes a first control transistor having its base connected to a control input connection and its collector connected to the base of the first signal input transistor, said first control transistor being operable in a low conduction condition when the first flip-flop section is in the first operating condition and the second flip-flop section is in the second operating condition and being operable in a high conduction condition when the first flip-flop section is in the second operating condition and the second flip-flop section is in the first operating condition; said first signal input transistor being biased to the low conduction condition when the first control transistor is in the high conduction condition; said second control means includes a second control transistor having its base connected to a control input connection and its collector connected to the base of the second signal input transistor, said second control transistor being operable in a low conduction condition when the first flip-flop section is in the second operating condition and the second flip-flop section is in the first operating condition and being operable in a high conduction condition when the first flip-flop section is in the first operating condition and the second flip-flop section is in the second operating condition; and said second signal Input transistor being biased to the low conduction condition when the second control transistor is in the high conduction condition.
Claim 14
Dependent Claim
172 words
A bistable circuit in accordance with claim 10 wherein: said first switching means includes a first switching transistor having its base connected to the first charge storage device, its emitter connected to the signal input terminal, and its collector connected to the first flip-flop section, said first switching transistor being operable to switch the first flip-flop section from the first operating condition to the second operating condition in response to a charge in the first charge storage device and to termination of the input signal at said signal input terminal; and said second switching means includes a second switching transistor having its base connected to the second charge storage device, its emitter connected to the signal input terminal, and its collector connected to the second flip-flop section, said second switching transistor being operable to switch the second flip-flop section from the first operating condition to the second operating condition in response to a charge in the second charge storage device and to termination of the input signal at the signal input terminal.
Claim 15
Dependent Claim
216 words
A bistable circuit in accordance with claim 10 further including: first discharging means including a first discharging transistor, said first discharging transistor being connected in shunt across the first charge storage device and having its base connected to a control input connection, said first discharging transistor being biased to a low conduction condition when the first flip-flop section is in the first operating condition and the second flip-flop section is in the second operating condition and being biased to a high conduction condition when the first flip-flop section is in the second operating condition and the second flip-flop section is in the first operating condition whereby the first charge storage device is discharged; second discharging means including a second discharging transistor, said second discharging transistor being connected in shunt across the second charge storage device and having its base connected to a control input connection, said second discharging transistor being biased to a low conduction condition when the first flip-flop section is in the second operating condition and the second flip-flop section is in the first operating condition and being biased to a high conduction condition when the first flip-flop section is in the first operating condition and the second flip-flop section is in the second operating condition whereby the second charge storage device is discharged.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-03-08 | 1974-09-07 | 1975-03-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-03-08 | 1978-09-07 | 1979-03-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-03-08 | 1982-09-07 | 1983-03-09 | $7700.00 | Window Closed / Lapsed |