US3569732A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Inductanceless igfet frequency doubler
Assignee: Shell USA Inc
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Filing: 1969-12-15
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Granted: 1971-03-09
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Expires: 1989-12-15
Abstract
Abstract An IGFET frequency doubler is provided by connecting across a bias voltage source a two-gate output IGFET in series with one or more resistance-connected IGFET''s. The two gates of the output IGFET are connected, respectively, to the source and drain electrodes of an input IGFET connected in series with, and between, a pair of resistance-connected TGET''s across the bias voltage source. By applying an alternating-current input signal to the gate electrode of the input IGFET, the ''''on'''' resistance of the input IGFET is varied. By proper choice of the operating points of the IGFET devices, any departure of the input IGFET ''''on'''' resistance in either direction from a predetermined center value results in a decrease of the ''''on'''' resistance of the output IGFET. Consequently, an output signal having double the frequency of the input signal appears at the junction between the output IGFET and the bias IGFET in series with it.
Inventors
- 👤 Alton O Christensen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 07:41
CPC Classifications
H; H03; H03B; H03B19/00; H03B19/06; H03B19/14; G; G10; G10H; G10H5/00; G10H5/02; G10H5/06
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
219 words
An IGFET frequency doubler circuit, comprising: a. output IGFET means having a pair of gate electrodes and being arranged to reduce the total ''''on'''' resistance of their sourcedrain circuit in response to an increase in the gate potential on one of said gate electrodes beyond a predetermined value; and b. means responsive to an alternating current input signal for increasing the gate potential beyond said predetermined value on one of said gate electrodes when the instantaneous value of said alternating current signal is positive, and on the other of said gate electrodes when the instantaneous value of said alternating current signal is negative, said means including: i. a source of DC bias; ii. a first bias IGFET having its drain and gate electrodes connected to one side of said bias source, and its source electrode connected to said one of said output IGFET gate electrodes; iii. an input IGFET having its gate electrode connected to said input signal, its drain electrode connected to the source electrode of said first bias IGFET, and its source electrode connected to the other of said output IGFET gate electrodes; and iv. a second bias IGFET having its gate and drain electrodes connected to the source electrode of said input IGFET, and its source electrode connected to the other side of said bias source.
Claim 2
Dependent Claim
219 words
An IGFET frequency doubler circuit, comprising: a. output IGFET means having a pair of gate electrodes and being arranged to reduce the total ''''on'''' resistance of their sourcedrain circuit in response to an increase in the gate potential on one of said gate electrodes beyond a predetermined value; and b. means responsive to an alternating current input signal for increasing the gate potential beyond said predetermined value on one of said gate electrodes when the instantaneous value of said alternating current signal is positive, and on the other of said gate electrodes when the instantaneous value of said alternating current signal is negative, said means including: i. a source of DC bias; ii. a first bias IGFET having its drain and gate electrodes connected to one side of said bias source, and its source electrode connected to said one of said output IGFET gate electrodes; iii. an input IGFET having its gate electrode connected to said input signal, its drain electrode connected to the source electrode of said first bias IGFET, and its source electrode connected to the other of said output IGFET gate electrodes; and iv. a second bias IGFET having its gate and drain electrodes connected to the source electrode of said input IGFET, and its source electrode connected to the other side of said bias source.
Claim 3
Dependent Claim
46 words
The circuit of claim 1, further including DC isolation means interposed in the connection between one of said source and drain electrodes of said input IGFET and the corresponding output IGFET gate electrode, and means for establishing a DC bias on that output IGFET gate electrode.
Claim 4
Dependent Claim
23 words
The circuit of claim 2, in which said DC bias-establishing means comprise a pair of resistance-connected IGFET''s connected across said DC bias source.
Claim 5
Dependent Claim
21 words
The circuit of claim 1, further comprising means for establishing a DC bias on said gate electrode of said input IGFET.
Claim 6
Dependent Claim
40 words
The circuit of claim 1, in which the circuit parameters are such that said first and second bias IGFET and said input IGFET remain in an enabled condition throughout substantially the entire range of potential variation of said input signal.
Claim 7
Dependent Claim
47 words
The circuit of claim 1, further comprising third bias IGFET means whose source drain circuit is connected in series with the source drain circuit of said output IGFET for establishing a DC bias on one of the electrodes of the source drain circuit of said output IGFET.
Claim 8
Dependent Claim
40 words
The circuit of claim 1, in which said predetermined value is so chosen that the variations of gate potential in response to said input signal occur substantially in the nonlinear region of the response curve of said output IGFET means.
Claim 9
Dependent Claim
24 words
The circuit of claim 1, in which said output IGFET has a single source electrode and a single drain electrode but two gate electrodes.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-03-08 | 1974-09-07 | 1975-03-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-03-08 | 1978-09-07 | 1979-03-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-03-08 | 1982-09-07 | 1983-03-09 | $7700.00 | Window Closed / Lapsed |