Integrated fet structure with substrate biasing means to effect bidirectional transistor operation

Claim 2

A semiconductor integrated circuit comprising a semiconductor substrate of one conductivity type, at least three three effect transistors each having a spaced pair of discrete semiconductor layers of another semiconductor type forming source and drain electrodes and a layer of insulating material therebetween carrying the gate electrode, a plurality of terminals connected to selected electrodes of said transistors, a terminal connected to said substrate, means for applying potentials to said terminals to cause said substrate to have a potential equal to or of opposite polarity to said layers and bidirectional biasing means for modifying the polarity of the potentials applied to said plurality of terminals relative to said substrate terminal to selectively bias the substrate relative to said pairs of spaced layers for providing one layer of each pair to be the source electrode and the other layer of each pair to be the drain electrode when the relative potential is of one polarity, said bidirectional biasing means being further characterized by providing a reversal of the functions of said source and drain layers by causing said one layer of each pair to be the drain electrode and said other layer of each pair to be the source electrode when the relative potential of said substrate terminal is of the other polarity whereby said circuit performs different computer functions.

Claim 3

A semiconductor integrated circuit comprising a semiconductor substrate having one conductivity type, at least three field effect transistors each having a source, drain and gate electrode, a plurality of spaced pairs of discrete semiconductor layers of the other conductivity type on said substrate with the layers of each pair being arranged in spaced relationship, a layer of insulating material between the semiconductor layers of each pair and a gate electrode overlying each of said insulating layers, terminal means connected to said substrate and to said source, drain and gate electrodes and means for applying electrical signals thereto with the potential of the substrate being equal or of opposite polarity to that of the potentials of the source and drain electrodes, said transistors thereby isolated one from the other with each transistor having a nondirectional characteristic whereby said transistors may be connected to perform diverse functions in an operative circuit, said substrate including at least five field effect transistors each having a gate, source and drain electrode, a first common connection coupling the gate and source electrodes of the first and third transistors, a second common connection coupling the drain electrode of the first transistor, the source electrode of the second transistor, the gate electrode of the fourth transistor and the source electrode of the fifth transistor, a third common connection between the drain electrode of the third transistor and the source electrode of the fourth transistor and external terminal means connected to the gate and drain electrodes of the second and fifth transistors, to the drain electrode of the fourth transistor, to said second common connection, to said first common connection and to said third common connection.

Claim 4

A semiconductor integrated circuit comprising a semiconductor substrate having one conductivity type, at least three field effect transistors each having a source, drain and gate electrode, a plurality of spaced pairs of discrete semiconductor layers of the other conductivity type on said substrate with the layers of each pair being arranged in spaced relationship, a layer of insulating material between the semiconductor layers of each pair and a gate electrode overlying each of said insulating layers, terminal means connected to said substrate and to said source, drain and gate electrodes and means for applying electrical signals thereto with the potential of the substrate being equal or of opposite polarity to that of the potentials of the source and drain electrodes, said transistors thereby isolated one from the other with each transistor having a nondirectional characteristic whereby said transistors may be connected to perform diverse functions in an operative circuit, said substrate including at least five field effect transistors each having a gate, source and drain electrode, a first common connection coupling the gate and source electrodes of the first and third transistors, a second common connection coupling the drain electrode of the first transistor, the source electrode of the second transistor, the gate electrode of the fourth transistor and the source electrode of the fifth transistor, a third common connection between the drain electrode of the third transistor and the source electrode of the fourth transistor and external terminal means connected to the gate and drain electrodes of the second and fifth transistors, to the drain electrode of the fourth transistor, to said second common connection, to said first common connection and to said third common connection.

Claim 5

A semiconductor integrated circuit comprising a semiconductor substrate having one conductivity type, at least tree field effect transistors each having a source, drain and gate electrode, a plurality of spaced pairs of discrete semiconductor layers of the other conductivity type on said substrate with the layers of each pair being arranged in spaced relationship, a layer of insulating material between the semiconductor layers of eAch pair and a gate electrode overlying each of said insulating layers, terminal means connected to said substrate and to said source, drain and gate electrodes and means for applying electrical signals thereto with the potential of the substrate being equal or of opposite polarity to that of the potentials of the source and drain electrodes, said transistors thereby isolated one from the other with each transistor having a nondirectional characteristic whereby said transistors may be connected to perform diverse functions in an operative circuit, said substrate including a plurality of sets of at least three field effect transistors each having a gate, drain and source electrodes, a first connection between the gate and source of the first transistor of each set, a second connection between the drain of said first transistor and the source of the second transistor of each set, a third connection between the gate of the second transistor and the source of the third transistor of each set, a fourth connection interconnecting said first connection of said sets, a fifth connection coupling the drains of the second transistors of said sets, a sixth connection coupling the gates of the third transistors of said sets and external terminals connected to each of said second connections, said fourth connection, said fifth connection, said sixth connection and the drains of each of the third transistors of each set.

Claim 6

A semiconductor integrated circuit comprising a semiconductor substrate having one conductivity type, at least tree field effect transistors each having a source, drain and gate electrode, a plurality of spaced pairs of discrete semiconductor layers of the other conductivity type on said substrate with the layers of each pair being arranged in spaced relationship, a layer of insulating material between the semiconductor layers of eAch pair and a gate electrode overlying each of said insulating layers, terminal means connected to said substrate and to said source, drain and gate electrodes and means for applying electrical signals thereto with the potential of the substrate being equal or of opposite polarity to that of the potentials of the source and drain electrodes, said transistors thereby isolated one from the other with each transistor having a nondirectional characteristic whereby said transistors may be connected to perform diverse functions in an operative circuit, said substrate including a plurality of sets of at least three field effect transistors each having a gate, drain and source electrodes, a first connection between the gate and source of the first transistor of each set, a second connection between the drain of said first transistor and the source of the second transistor of each set, a third connection between the gate of the second transistor and the source of the third transistor of each set, a fourth connection interconnecting said first connection of said sets, a fifth connection coupling the drains of the second transistors of said sets, a sixth connection coupling the gates of the third transistors of said sets and external terminals connected to each of said second connections, said fourth connection, said fifth connection, said sixth connection and the drains of each of the third transistors of each set.

Claim 7

A semiconductor integrated circuit comprising a semiconductor substrate having one conductivity type, at least three field effect transistors each having a source, drain and gate electrode, a plurality of spaced pairs of discrete semiconductor layers of the other conductivity type on said substrate with the layers of each pair being arranged in spaced relationship, a layer of insulating material between the semiconductor layers of each pair and a gate electrode overlying each of said insulating layers, terminal means connected to said substrate and to said source, drain and gate electrodes and means for applying electrical signals thereto with the potential of the substrate being equal or of opposite polarity to that of the potentials of the source and drain electrodes, said transistors thereby isolated one from the other with each transistor having a nondirectional characteristic whereby said transistors may be connected to perform diverse functions in an operative circuit, said substrate including a plurality of sets of at least three field effect transistors each having gate, drain and source electrodes, a first connection between the gate of the first transistor and the source of the third transistor of each set, a second connection between the drain of the first transistor and the source of the second transistor of each set, a third connection coupling the gate and drain of the second transistor with the gate of the third transistor of each set, a fourth connection coupling said third connections one to the other, a fifth connection interconnecting the sources of the first transistors of said sets and external terminal connected to each of said second connections, said fourth connection, said fifth connection and the drain of the third transistor of each set.

Claim 8

A semiconductor integrated circuit comprising a semiconductor substrate having one conductivity type, at least three field effect transistors each having a source, drain and gate electrode, a plurality of spaced pairs of discrete semiconductor layers of the other conductivity type on said substrate with the layers of each pair being arranged in spaced relationship, a layer of insulating material between the semiconductor layers of each pair and a gate electrode overlying each of said insulating layers, terminal means connected to said substrate and to said source, drain and gate electrodes and means for applying electrical signals thereto with the potential of the substrate being equal or of opposite polarity to that of the potentials of the source and drain electrodes, said transistors thereby isolated one from the other with each transistor having a nondirectional characteristic whereby said transistors may be connected to perform diverse functions in an operative circuit, said substrate including a plurality of sets of at least three field effect transistors each having gate, drain and source electrodes, a first connection between the gate of the first transistor and the source of the third transistor of each set, a second connection between the drain of the first transistor and the source of the second transistor of each set, a third connection coupling the gate and drain of the second transistor with the gate of the third transistor of each set, a fourth connection coupling said third connections one to the other, a fifth connection interconnecting the sources of the first transistors of said sets and external terminal connected to each of said second connections, said fourth connection, said fifth connection and the drain of the third transistor of each set.