US3568181A
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System for linearizing a nonlinear continuous function by variable time sampling
Assignee: Anadex Inc
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Filing: 1968-07-12
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Granted: 1971-03-02
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Expires: 1988-07-12
Abstract
Abstract A voltage representing a point on a nonlinear continuous curve having a known characteristic shape is converted to a periodic function having a frequency determined by the magnitude of the input voltage. A gating means is enabled by a variable time base generating means and applies the periodic function to a counting means for a sample time determined by the frequency of the periodic function, the accumulated count in the counting means, and the characteristic shape of the voltage curve. When the gating means is disabled at the end of the sample time, the counting means contains a value representing the magnitude of the input voltage.
Inventors
- 👤 John H Weaver
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 20:31
CPC Classifications
H; H03; H03M; H03M1/00; G; G01; G01K; G01K7/00; G01K7/02; G01K7/14; H03M1/12; H03M1/22
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
250 words
An apparatus for digitizing a continuous, nonlinear analogue function having a known characteristic curve comprising: a voltage controlled oscillator having a periodic function output with a frequency determined by said analogue function; a first counting means; a first Gating means for applying said periodic function as an input to said counting means when said first gating means is enabled; decoding means for generating status signals indicating the count values contained in said first counting means; a binary having a first and a second state, said first gating means being enabled when said binary is in said first state; a fixed frequency oscillator; a second counting means having a fixed count capacity, said second counter generating a stop signal when it reaches its count capacity disabling said first gating means and causing said binary to assume said second state; second gating means for applying the output of said fixed frequency oscillator to said second counting means; and logic means responsive to said status signals from said decoding means and to the frequency and sign of said periodic function for (i) adding additional pulse inputs into said second counting means, or (ii) blocking pulse inputs into said second counting means from said fixed frequency oscillator, the addition of pulses or blocking of pulses determined as a function of the sign of said periodic function, the rate at which said pulses are added or blocked being determined by the frequency of said periodic function and predetermined count values contained in said first counter.
Claim 2
Independent Claim
250 words
An apparatus for digitizing a continuous, nonlinear analogue function having a known characteristic curve comprising: a voltage controlled oscillator having a periodic function output with a frequency determined by said analogue function; a first counting means; a first Gating means for applying said periodic function as an input to said counting means when said first gating means is enabled; decoding means for generating status signals indicating the count values contained in said first counting means; a binary having a first and a second state, said first gating means being enabled when said binary is in said first state; a fixed frequency oscillator; a second counting means having a fixed count capacity, said second counter generating a stop signal when it reaches its count capacity disabling said first gating means and causing said binary to assume said second state; second gating means for applying the output of said fixed frequency oscillator to said second counting means; and logic means responsive to said status signals from said decoding means and to the frequency and sign of said periodic function for (i) adding additional pulse inputs into said second counting means, or (ii) blocking pulse inputs into said second counting means from said fixed frequency oscillator, the addition of pulses or blocking of pulses determined as a function of the sign of said periodic function, the rate at which said pulses are added or blocked being determined by the frequency of said periodic function and predetermined count values contained in said first counter.
Claim 3
Dependent Claim
40 words
The apparatus as described in claim 1 further including a one-shot multivibrator responsive to said second counter for generating an output pulse having a predetermined duration when said stop signal is generated, said output pulse disabling said first gating means.
Claim 4
Dependent Claim
44 words
The apparatus as described in claim 1 further including a display means responsive to the count value contained in said first counting means and to said stop signal for displaying the count value in said first counting means when said stop signal is generated.
Claim 5
Dependent Claim
119 words
The apparatus as described in claim 1 wherein said logic means comprises: a third counting means having said periodic function as an input for dividing said function by predetermined divisor values and generating corresponding pulse outputs; permutation logic responsive to said status signals generated by said decoding means for permutating the counting of said third counting means to determine said divisor values; and synchronization means having said third counting means pulse outputs as an input and responsive to said fixed frequency oscillator output for generating an add pulse input to said second gating means when said third counting means generates a pulse output, said add pulse being noncoincident with said fixed frequency oscillator input to said second gating means.
Claim 6
Dependent Claim
238 words
The apparatus as described in claim 1 wherein said logic means comprises; synchronization means having said periodic function as an input and responsive to said fixed frequency oscillator output for generating count pulses at a frequency corresponding to the frequency of said periodic function input, each said count pulse generated in a predetermined phase relationship with said fixed frequency oscillator output and having a duration exceeding but less than twice the period of said fixed frequency oscillator output; third counting means for dividing said count pulses by predetermined divisor values and generating corresponding outputs; permutation logic responsive to said status signals generated by said decoding means for permutating the counting of said third counting means to determine said divisor values; a second binary having a first and second state coupled to said third counting means, said binary being set to said first state for each output generated by said third counting means; reset logic means responsive to said third counting means and to said status signals operated by said decoding means for resetting said second binary to said second state a predetermined number of count pulses after said second binary assumed said first state, said predetermined number of count pulses being a functioN of said status signals; and third gating means responsive to said count pulses and said second binary for disabling said second gating means when said count pulse is coincident with said second binary''s first state.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-03-01 | 1974-08-31 | 1975-03-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-03-01 | 1978-08-31 | 1979-03-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-03-01 | 1982-08-31 | 1983-03-02 | $7700.00 | Window Closed / Lapsed |