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US3568085A Expired / Lapsed US ⏱️ 0.0 years remaining

Frequency short interval sample and long period frequency hold circuit

Assignee: Meritor Automotive Canada Inc
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Filing: 1968-10-07
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Granted: 1971-03-02
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Expires: 1988-10-07
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Abstract

Abstract A frequency determined voltage short interval sample and long period frequency hold circuit with a dual feedback amplifier circuit alternatively switchable between a first feedback path with simultaneous connection for sampling an input signal voltage and a second feedback path for relatively long hold intervals; and with the first feedback path providing normal gain during the relatively short sample intervals and with the second feedback path including an amplifier and providing substantially zero gain around the amplifier loop.

Inventors

  • 👤 Vladimir J Pimenoff

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 05:12
CPC Classifications
G; G11; G11C; G11C27/00; G11C27/02; G11C27/024; G11C27/026

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 115 words
In a voltage sample and hold circuit, a voltage source subject to being sampled; an amplifier circuit with two feedback circuits, a first feedback circuit providing normal gain during a voltage sample state of operation, and a second feedback circuit establishing substantially zero gain around its amplifier loop during a voltage hold state of operation; and switch means connected to both said first and second feedback circuits and to said voltage source alternatively switchable to close said first and second feedback circuits; and said switch means connecting said voltage source to said amplifier circuit when said switch means is in the sample state of operation and said first feedback circuit is closed for normal gain.
Claim 2
Dependent Claim 115 words
In a voltage sample and hold circuit, a voltage source subject to being sampled; an amplifier circuit with two feedback circuits, a first feedback circuit providing normal gain during a voltage sample state of operation, and a second feedback circuit establishing substantially zero gain around its amplifier loop during a voltage hold state of operation; and switch means connected to both said first and second feedback circuits and to said voltage source alternatively switchable to close said first and second feedback circuits; and said switch means connecting said voltage source to said amplifier circuit when said switch means is in the sample state of operation and said first feedback circuit is closed for normal gain.
Claim 3
Dependent Claim 36 words
The voltage sample and hold circuit of claim 1 wherein, the amplifieR circuit includes amplifier staging having an input and an output, and capacitive means continually connected between said input and output of said amplifier staging.
Claim 4
Dependent Claim 42 words
The voltage sample and hold circuit of claim 2 wherein, said first feedback circuit includes resistive means subject to being connected in parallel with said capacitive means when said switch means closes said first feedback circuit for the sample state of operation.
Claim 5
Dependent Claim 17 words
The voltage sample and hold circuit of claim 3 wherein, said second feedback circuit includes amplifier staging.
Claim 6
Dependent Claim 63 words
The voltage sample and hold circuit of claim 4 wherein, said second feedback circuit also includes series connected with said amplifier staging of said second feedback circuit, a first resistor and a second resistor subject to being connected as a series circuit in parallel with said capacitive means when said switch means closes said second feedback circuit for the hold state of operation.
Claim 7
Dependent Claim 35 words
The voltage sample and hold circuit of claim 5 wherein, a third resistor is connected between a point in said second feedback circuit between said first and second resistors and a voltage potential reference source.
Claim 8
Dependent Claim 43 words
The voltage sample and hold circuit of claim 6 wherein, the series connected portions of said second feedback circuit are serially connected, in order from said output, first, said second feedback circuit amplifier staging, second, said first resistor; and third, said second resistor.
Claim 9
Dependent Claim 21 words
The voltage sample and hold circuit of claim 7 wherein, said second feedback circuit amplifier staging provides a gain of -1.
Claim 10
Dependent Claim 54 words
The voltage sample and hold circuit of claim 1 wherein, said switch means is a relay switch, with a first throw connected as a switch for said first feedback circuit, and with a second throw connected as a switch for said second feedback circuit and to connect said amplifier circuit to said voltage source.
Claim 11
Dependent Claim 108 words
The voltage sample and hold circuit of claim 1 in a stabilized master oscillator system wherein, said stabilized master oscillator system includes a voltage controlled oscillator circuit connected to received the output of said voltage sample and hold circuit, and with said voltage controlled oscillator circuit having an output signal connection as an input to a divider circuit; said divider circuit being provided with an output connection to a discriminator circuit receiving an additional input from a reference signal source; and with said discriminator circuit having an output connection through voltage signal stabilizing means as said voltage source subject to being sampled by said sample and hold circuit.
Claim 12
Dependent Claim 62 words
The stabilized master oscillator system of claim 10 wherein, a power supply and pulse generator circuit is included having an output connection as an input to said divider circuit, and with said power supply and pulse generator circuit having an additional output connection through signal delay circuit means to actuating control means in said sample and hold circuit for said switch means.

References Cited (Backward Citations)

US3304507A Cited
US3392345A Cited
US3381231A Cited
US3421105A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-03-01 1974-08-31 1975-03-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-03-01 1978-08-31 1979-03-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-03-01 1982-08-31 1983-03-02 $7700.00 Window Closed / Lapsed

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