US3568071A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Digital filter
Assignee: Singer Co
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Filing: 1968-10-21
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Granted: 1971-03-02
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Expires: 1988-10-21
Abstract
Abstract In a system for accepting each change of signal level as part of a message pulse only if it persists for a prescribed time, that time is measured with a high-speed counter to give high precision and to reduce the jitter that is imposed on the recovered message. A separate counter for each input signal level runs in response to that level and is reset in response to the other level. On reaching a prescribed count it passes a signal to an output flip-flop.
Inventors
- 👤 Beat A Kocher
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 19:34
CPC Classifications
H; H04; H04L; H04L1/00; H04L1/20; G; G01; G01R; G01R29/00; G01R29/02; G01R29/027; G01R29/0273
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
343 words
In a system for receiving input signal pulses of a first value and a second value, including a source of regularly recurring clock pulses, an improved filter for eliminating noise pulses from said input signal pulses, said filter comprising: first counting means responsive to the presence of an input signal pulse of said first value for counting up to a first predetermined number of clock pulses; means for generating a first control signal when said input signal pulse is at said second value, and a second control signal when said input signal pulse is at said first value; second counting means being responsive to said first control signal for counting up to a second predetermined number of clock pulses; first gate means responsive to the presence of said first predetermined number of clock pulses in said first counting means for generating a third control signal; second gates means responsive to the presence of said second predetermined number of clock pulses in said second counting means for generating a fourth control signal; said first counting means being responsive to the presence of said third control signal for maintaining said first predetermined count in said first counting means; said second counting means being responsive to the presence of said fourth control signal for maintaining said second predetermined count in said second counting means; bistable means switchable between a first state and a second state for transmitting an output signal of a first value when in said first state and for transmitting an output signal of a second value when in said second state, said bistable means being responsive to said third control signal for switching from said second state to said first state and being responsive to said fourth control signal for switching from said first state to said second state; said first counting means being responsive to said input signal pulses for clearing any count contained therein when said input signal pulses are of said second value; said second counting means being responsive to said second control signal for clearing any count contained therein.
Claim 2
Dependent Claim
343 words
In a system for receiving input signal pulses of a first value and a second value, including a source of regularly recurring clock pulses, an improved filter for eliminating noise pulses from said input signal pulses, said filter comprising: first counting means responsive to the presence of an input signal pulse of said first value for counting up to a first predetermined number of clock pulses; means for generating a first control signal when said input signal pulse is at said second value, and a second control signal when said input signal pulse is at said first value; second counting means being responsive to said first control signal for counting up to a second predetermined number of clock pulses; first gate means responsive to the presence of said first predetermined number of clock pulses in said first counting means for generating a third control signal; second gates means responsive to the presence of said second predetermined number of clock pulses in said second counting means for generating a fourth control signal; said first counting means being responsive to the presence of said third control signal for maintaining said first predetermined count in said first counting means; said second counting means being responsive to the presence of said fourth control signal for maintaining said second predetermined count in said second counting means; bistable means switchable between a first state and a second state for transmitting an output signal of a first value when in said first state and for transmitting an output signal of a second value when in said second state, said bistable means being responsive to said third control signal for switching from said second state to said first state and being responsive to said fourth control signal for switching from said first state to said second state; said first counting means being responsive to said input signal pulses for clearing any count contained therein when said input signal pulses are of said second value; said second counting means being responsive to said second control signal for clearing any count contained therein.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-03-01 | 1974-08-31 | 1975-03-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-03-01 | 1978-08-31 | 1979-03-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-03-01 | 1982-08-31 | 1983-03-02 | $7700.00 | Window Closed / Lapsed |