Multiplexing system for a high speed storage device
Abstract
Abstract A MULTIPLEXING SYSTEM IN WHICH A SINGLE BIT DRIVER AND A SENSE AMPLIFIER ARE CONNECTED IN COMMON TO PLURAL CHANNELS OF A CONDUCTOR NETWORK. DIODE MEANS ARE PROVIDED IN THE CHANNELS TO BLOCK SIGNAL PULSES IN UNSELECTED CHANNELS AND TO PROTECT THE SENSE AMPLIFIER FROM HIGH ENERGY PULSES GENERATED BY THE BIT DRIVER WHEN WRITE OPERATIONS ARE PERFORMED IN THE MEMORY BIT SENSE LINES. THE BIT-SENSE LINES OF THE MEMORY DEVICE ARE CONNECTED TO THE VARIOUS CHANNELS BY TRANSFORMER COUPLING. VOLTAGE SWITCHES OPERATED BY LOGIC CIRCUITRY ARE CONNECTED TO THE TRANSFORMER WINDINGS TO EFFECT THE CONNECTION OF THE BIT DRIVER AND THE SENSE AMPLIFIER TO THE DESIRED MEMORY CHANNEL TO PERFORM READ/WRITE OPERATIONS IN THE MEMORY DEVICE.
Inventors
- 👤 Raymond A Schulz
Bibliographic Details
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-02-22 | 1974-08-24 | 1975-02-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-02-22 | 1978-08-24 | 1979-02-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-02-22 | 1982-08-24 | 1983-02-23 | $7700.00 | Window Closed / Lapsed |