US3566212A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High temperature semiconductor package
Assignee: Motorola Solutions Inc
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Filing: 1969-02-24
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Granted: 1971-02-23
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Expires: 1989-02-24
Abstract
Abstract A package for a transistor or other semiconductor device wherein a semiconductor crystal is connected to a first thermal conducting ceramic layer and enclosed within a cavity created by a second thermal conducting ceramic layer. Openings in at least one of the thermal conducting ceramic layers are filled with a conductive material, the material making electrical contact with the active regions of the semiconductor device. Metal contacts are connected to the thermal conducting ceramic layer making electrical contact with the conductive material in the openings, and therefore making electrical contact with the active regions of the semiconductor device.
Inventors
- 👤 David Wayne Marx
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 18:25
CPC Classifications
H; H10; H10W; H10W76/00; H10W76/10; H10W76/12; H10W76/15
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
119 words
A combination of a semiconductor device and package therefor comprising: a. first and second thermally conducting ceramic members connected together and forming a closed cavity within said connected members; b. a semiconductor wafer disposed within said cavity and in contact with said first and second thermally conducting members; c. an opening through each of said first and second thermally conducting members, said openings being filled with an electrically conductive material, said electrically conductive material being in electrical contact respectively with said semiconductor wafer; and d. a metal contact connected to each of said first anD second thermally conducting ceramic members said contacts contacting respectively said electrically conductive material in the openings in said first and second thermally conducting members.
Claim 2
Dependent Claim
256 words
A combination of semiconductor device and package therefor comprising: a. a semiconductor wafer having top, bottom, and side surfaces; b. a first passivating member having top, bottom, and side surfaces the top surface of which is connected to an electrically conductive layer for making an electrical connection; c. means for connecting the bottom surface of said semiconductor wafer to said electrically conductive layer on said top surface of said first passivating member; d. a second passivating member having top, bottom, and side surfaces a first predetermined area of the bottom surface of which is connected to said top surface of said semiconductor wafer, said second passivating member having an opening from the top to the bottom surface thereof, said opening giving access to predetermined areas on the top surface of said semiconductor wafer, and electrically conductive material being disposed within said opening and electrically contacting the top surface of said semiconductor wafer; e. thermally conducting, electrically inert means connected to a second predetermined area of the bottom surface of said second passivating member, to said electrically conductive layer on the top surface of said first passivating member and to the side surfaces of said semiconductor wafer, said means for enclosing said semiconductor wafer; f. a metal contact connected to the top surface of said second passivating member, said metal contact contacting said electrically conductive material disposed within said opening in said second passivating member, and g. at least one metal contact connected to said electrically conductive layer on said top surface of said first passivating member.
Claim 3
Dependent Claim
236 words
A combination of a semiconductor device and package therefor comprising: a. a semiconductor wafer having top, bottom, and side surfaces; b. a first passivating member having top, bottom and side surfaces, the top surface of which is connected to an electrically conductive layer for making an electrical connection; c. means for connecting the bottom surface of said semiconductor wafer to said electrically conductive layer on said top surface of said first passivating member; d. a second passivating member having top, bottom, and side surfaces, a predetermined area of the bottom surface of which is connected to said top surface of said semiconductor wafer, said second passivating member having an opening from the top to the bottom surface thereof, said opening giving access to predetermined areas on the top surface of said semiconductor wafer, and electrically conductive material being disposed within said opening in said second passivating member and contacting the top surface of said semiconductor wafer; passivating e. means for connecting a second predetermined area of the bottom surface of said second passivating layer to the top surface of said first passivating member; f. a metal contact connected to the top surface of said second passivating member, said metal contact contacting said electrically conductive material disposed within said opening in said second passivating member; and g. at least one metal contact coupled to said electrically conductive layer on said top surface of said first passivating member.
Claim 4
Dependent Claim
17 words
The combination as defined in claim 4 in which said first and second passivating members are BeO.
Claim 5
Dependent Claim
13 words
The combination as defined in claim 4 wherein said metal contacts are aluminum.
Claim 6
Dependent Claim
26 words
The combination as defined in claim 4 wherein said metal contacts extend beyond the side surfaces of said passivating member and serve as external connecting surfaces.
Claim 7
Dependent Claim
89 words
The combination as defined in claim 4 wherein said means for coupling said second passivating member to said first passivating member is a third passivaTing member having a top, bottom, and side surfaces with an opening from the top to the bottom surface, said opening dimensionally larger than said semiconductor wafer, the top surface of which is coupled to the bottom surface of said second passivating member and the bottom surface of which is coupled to the electrically conductive layer on the top surface of said first passivating member.
Claim 8
Dependent Claim
14 words
The combination as defined in claim 8 wherein said third passivating member is BeO.
Claim 9
Dependent Claim
279 words
The combination of a semiconductor device and a package therefor comprising: a. a semiconductor wafer having top, bottom and side surfaces; b. a first passivating member having top, bottom, and side surfaces, the top surface of which is connected to the bottom surface of said semiconductor wafer, said first passivating member having at least one opening from the top to the bottom surface for access to predetermined areas of the bottom surface of said semiconductor wafer, said openings being filled with an electrically conductive material, said electrically conductive material contacting the bottom surface of said semiconductor wafer; c. a metal contact connected to the bottom surface of said first passivating member, said contact contacting said electrically conductive material in said openings in said first passivating member; d. a second passivating member having top, bottom, and side surfaces, a predetermined area of the bottom surface of which is connected to the top surface of said semiconductor wafer said second passivating member having a plurality of openings from the top to the bottom surface, said openings giving access to predetermined areas on the top surface of said semiconductor wafer and electrically conductive material in said plurality of openings in said second passivating member and contacting the top surface of said semiconductor wafer; e. means for coupling a second predetermined area of the bottom surface of said second passivating member to the top surface of said first passivating member; and f. a plurality of metal contacts connected to the top surface of said second passivating member, each of said plurality of metal contacts contacting the electrically conductive material in a predetermined number of the plurality of openings in said second passivating member.
Claim 10
Dependent Claim
38 words
The combination as defined in claim 10 wherein said metal contact connected to the bottom surface of said first passivating member extends beyond the side surfaces of said first passivating member and serves as an external connecting surface.
Claim 11
Dependent Claim
13 words
The combination as defined in claim 10 wherein said metal contacts are aluminum.
Claim 12
Dependent Claim
17 words
The combination as defined in claim 10 in which said first and second passivating members are BeO.
Claim 13
Dependent Claim
84 words
The combination as defined in claim 10 wherein said means for connecting said second passivating member to said first passivating member is a third passivating member having a top, bottom, and side surfaces with an opening from the top to the bottom surface, said opening dimensionally larger than said semiconductor wafer, the top surface of which is connected to the bottom surface of said second passivating member and the bottom surface of which is connected to the top surface of said first passivating member.
Claim 14
Dependent Claim
14 words
The combination as defined in claim 14 wherein said third passivating member is BeO.
Claim 15
Dependent Claim
254 words
A combination of a semiconductor device and the package therefor comprising: a. a semiconductor wafer having top, bottom and side surfaces; b. a first passivating member having top, bottom, and side surfaces, the top surface of which having at least three predetermined areas at least two of which are connected to a first and second electrically conductive layer respectively; c. means for connecting predetermined areas on the bottom surface of said semiconductor wafer to a predetermined one of said first and second electrically conductive layers respectively on the top surface of said first passivatIng member; d. a second passivating member having top, bottom, and side surfaces, a first predetermined area of the bottom surface of which is connected to the top surface of said semiconductor wafer, said second passivating member having an opening from the top to the bottom surface, said opening being filled with electrically conductive material, and said electrically conductive material contacting a predetermined area on the top surface of said semiconductor wafer; e. means for connecting a second predetermined area of the bottom surface of said second passivating member to the first and second electrically conductive layers respectively on the top surface of said first passivating member; f. a metal contact connected to the top surface of said second passivating member said metal contact contacting the electrically conductive material in the opening in said second passivating member; and g. a metal contact connected to each of said first and second conductive layers on the top surface of said first passivating member.
Claim 16
Dependent Claim
16 words
The combination as defined in claim 16 wherein said first and second passivating members are BeO.
Claim 17
Dependent Claim
39 words
The combination as defined in claim 16 in which the metal contact coupled to the top surface of said second passivating member extends beyond the side surfaces of said second passivating member and serves as an external connecting surface.
Claim 18
Dependent Claim
13 words
The combination as defined in claim 16 wherein said metal contacts are aluminum.
Claim 19
Dependent Claim
88 words
The combination as defined in claim 16 wherein said means for connecting said second passivating member to said first passivating member is a third passivating member having top, bottom, and side surfaces, with an opening from the top to the bottom surface, said opening dimensionally larger than said semiconductor wafer, the top surface of which is connected to the bottom surface of said second passivating member and the bottom surface of which is connected to the three predetermined areas on the top surface of said first passivating member.
Claim 20
Dependent Claim
14 words
The combination as defined in claim 20 wherein said third passivating member is BeO.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-02-22 | 1974-08-24 | 1975-02-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-02-22 | 1978-08-24 | 1979-02-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-02-22 | 1982-08-24 | 1983-02-23 | $7700.00 | Window Closed / Lapsed |