Delay line control gated micrologic clock generator

Abstract

Abstract A delay line and logic control gated micrologic circuit clock signal pulse train generator with each pulse waveform clock signal in synchronism with its initiating gate trigger signal. A NAND gate receives an activating gate trigger signal and immediately a voltage shift in NAND gate output with this is then passed through a delay line coil both to output path means and also back as an additional input inhibit for the NAND gate at a predetermined delay determined by the delay line. The immediately resulting voltage shift at the NAND gate output is again passed through the delay line coil with the same delay to then remove the inhibit signal from the NAND gate with again an immediate shift in the NAND gate output voltage, and with the pulse generating cycle continually repeating itself with precise pulse width and spacing between pulses in a pulse train in synchronism although delayed from the start of the activating gate trigger signal with the pulse train cycle generating action continued just so long as the activating gate trigger signal is applied.

Inventors

• 👤 Floyd M Totten

Bibliographic Details