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US3558862A Expired / Lapsed US ⏱️ 0.0 years remaining

Circuit for dimensional verification of punched tapes

Assignee: United States Atomic Energy Commission
•
Filing: 1969-04-15
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Granted: 1971-01-26
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Expires: 1989-04-15
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Abstract

Abstract A circuit has been provided for verifying punched tapes used in digital data storage to determine whether the spacing between lines of information is within tolerance. A photodiode is exposed successively by the tapes'' sprocket holes, thus developing a signal whose duration is proportional to the ''''dark time'''' between the holes. This signal is compared on a time basis with a generated timing signal based on the number of constant frequency clock pulses registered by a binary counter and produces an error signal which is used to turn the tape reader ''''off'''' upon detecting an increase or decrease in the dark time.

Inventors

  • 👤 David E Mcmillan

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 20:28
CPC Classifications
G; G06; G06K; G06K7/00; G06K7/01; G06K7/016; G06K7/0163; G06K5/00

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 564 words
A circuit for dimensional verification of a moving punched tape having a continuous column of sprocket holes aligned with laterally extending punched holes of the tape, comprising: a tape reader including a drive mechanism for moving said tape at a constant speed and a sprocket hole sensing element positioned adjacent said tape and activated to produce an output signal responsive to the passing of each of said sprocket holes past said sensing element; a counter having a pulse count input and a reset input, said reset input being connected to receive the output of said sensing element so that said counter is reset each time said sensing element is activated; a clock pulse generator; a first gate having a first input connected to receive pulses generated by said sensing element, a second input connected to said clock pulse generator and an output connected to said pulse count input of said counter for gating said clock pulses to said counter for a period of time that said sensing element is masked by the spacing between the sprocket holes of said tape; a second gate having a plurality of inputs connected to selected outputs of said counter so that said second gate is enabled at a predetermined low count registered in said counter, said low count being slightly below the counts registered for a normal sprocket hole spacing interval; a third gate having a plurality of inputs connected to selected outputs of said counter so that said third gate is enabled at a predetermined high count registration in said counter, said high count being slightly above said normal count; a first bistable switching means having a set input connected to the output of said second gate, a reset input connected to the output of said third gate so that said switching means is switched to the set state upon receiving an output from said second gate and switched to the reset state upon receiving an output from said third gate and a trigger input connected to receive the output of said sensing element to reset said switching means each time said sensing element is activated; a fourth gate giving a first input connected to receive said signal from said sensing element, a second input connected to said set output of said first bistable switching means and a third input, said fourth gate being enabled by said first bistable switch to pass an error signal when said first bistable switch is in the set state and a sprocket hole is detected by said sensing means, indicating an out of tolerance hole spacing; an OR gate having first and second inputs and an output, said first input connected to the output of said fourth gate; a stop switch having one end connected to ground potential and the other end connected to said second input of said OR gate; a second bistable switching means having set and reset inputs, said reset input connected to the output of said OR gates; a start switch having one end connected to ground potential and the other end connected to said set input of said second bistable switching means and said third input of said fourth gate; and means connected between a reset output of said second bistable switching means and said tape reader for stopping and starting said tape reader according to the state of operation of said second bistable switching means.
Claim 2
Dependent Claim 564 words
A circuit for dimensional verification of a moving punched tape having a continuous column of sprocket holes aligned with laterally extending punched holes of the tape, comprising: a tape reader including a drive mechanism for moving said tape at a constant speed and a sprocket hole sensing element positioned adjacent said tape and activated to produce an output signal responsive to the passing of each of said sprocket holes past said sensing element; a counter having a pulse count input and a reset input, said reset input being connected to receive the output of said sensing element so that said counter is reset each time said sensing element is activated; a clock pulse generator; a first gate having a first input connected to receive pulses generated by said sensing element, a second input connected to said clock pulse generator and an output connected to said pulse count input of said counter for gating said clock pulses to said counter for a period of time that said sensing element is masked by the spacing between the sprocket holes of said tape; a second gate having a plurality of inputs connected to selected outputs of said counter so that said second gate is enabled at a predetermined low count registered in said counter, said low count being slightly below the counts registered for a normal sprocket hole spacing interval; a third gate having a plurality of inputs connected to selected outputs of said counter so that said third gate is enabled at a predetermined high count registration in said counter, said high count being slightly above said normal count; a first bistable switching means having a set input connected to the output of said second gate, a reset input connected to the output of said third gate so that said switching means is switched to the set state upon receiving an output from said second gate and switched to the reset state upon receiving an output from said third gate and a trigger input connected to receive the output of said sensing element to reset said switching means each time said sensing element is activated; a fourth gate giving a first input connected to receive said signal from said sensing element, a second input connected to said set output of said first bistable switching means and a third input, said fourth gate being enabled by said first bistable switch to pass an error signal when said first bistable switch is in the set state and a sprocket hole is detected by said sensing means, indicating an out of tolerance hole spacing; an OR gate having first and second inputs and an output, said first input connected to the output of said fourth gate; a stop switch having one end connected to ground potential and the other end connected to said second input of said OR gate; a second bistable switching means having set and reset inputs, said reset input connected to the output of said OR gates; a start switch having one end connected to ground potential and the other end connected to said set input of said second bistable switching means and said third input of said fourth gate; and means connected between a reset output of said second bistable switching means and said tape reader for stopping and starting said tape reader according to the state of operation of said second bistable switching means.
Claim 3
Dependent Claim 30 words
A circuit as set forth in a claim 1 wherein said clock pulse generator is an astable multivibrator having an adjustable pulse rate and said counter is a binary counter.

References Cited (Backward Citations)

US2641956A Cited
US2934949A Cited
US3174029A Cited
US3044695A Cited
US3067934A Cited
US3222501A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-01-25 1974-07-27 1975-01-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-01-25 1978-07-27 1979-01-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-01-25 1982-07-27 1983-01-26 $7700.00 Window Closed / Lapsed

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