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US3555261A Expired / Lapsed US ⏱️ 0.0 years remaining

Solid state analog computer-type calibrator for a radio interferometer

Assignee: United States Department of the Army
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Filing: 1968-10-28
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Granted: 1971-01-12
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Expires: 1988-10-28
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Abstract

Abstract A solid state multiplier for an analogue computer which permits the unique determination of the bearing and elevation angles of arrival of a signal ray. The multiplier provides solutions to a set of interferometer descriptive equations corresponding to data supplied by three two-element interferometers and a centralcrossed Adcock array.

Inventors

  • 👤 William Christian Mcclurg

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 19:13
CPC Classifications
G; G06; G06G; G06G7/00; G06G7/12; G06G7/16; G06G7/163; G06G7/22

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 189 words
A solid state multiplier comprising: a gate generator responsive to any suitable source of alternating current, said generator effective for producing a gating signal corresponding to a predetermined number of cycles of the input AC source; a ramp generator electrically connected to said gate generator, whereby a linear voltage ramp is provided at the output terminal of said ramp generator in response to and for the duration of each gating signal; an analogue input signal source for providing a trigonometric representation of the bearing and elevation angles of arrival of an input signal ray; a sample and hold circuit connected to the same input alternating current source as said gate generator; comparator means for comparing said input analogue signal with said ramp signal and, upon detection of both signals being of equal value, for providing a trigger signal to said sample and hold circuit; said sample and hold circuit activated by said trigger pulse from said comparator means for providing an output signal indicative of the phase and amplitude of said alternating current input signal at the instant the ramp signal and the analogue signal are of equal amplitude.
Claim 2
Dependent Claim 189 words
A solid state multiplier comprising: a gate generator responsive to any suitable source of alternating current, said generator effective for producing a gating signal corresponding to a predetermined number of cycles of the input AC source; a ramp generator electrically connected to said gate generator, whereby a linear voltage ramp is provided at the output terminal of said ramp generator in response to and for the duration of each gating signal; an analogue input signal source for providing a trigonometric representation of the bearing and elevation angles of arrival of an input signal ray; a sample and hold circuit connected to the same input alternating current source as said gate generator; comparator means for comparing said input analogue signal with said ramp signal and, upon detection of both signals being of equal value, for providing a trigger signal to said sample and hold circuit; said sample and hold circuit activated by said trigger pulse from said comparator means for providing an output signal indicative of the phase and amplitude of said alternating current input signal at the instant the ramp signal and the analogue signal are of equal amplitude.
Claim 3
Dependent Claim 39 words
The multiplier as set forth in claim 1, further including a feedback circuit from the output of the ramp generator to the gate generator whereby the period of the ramp signal is controlled both as to length and slope,
Claim 4
Dependent Claim 83 words
The multiplier as set forth in claim 1, further including at least two sample and hold circuits, wherein both of said circuits are connected to be simultaneously activated upon the receipt of a trigger pulse from said comparator with each of said sample and hold circuits being connected to said source of alternating current, one circuit connected for zero degree phase angle reception and the other circuit connected for 90* phase angle reception thus providing sine and cosine functions respectively as output signals.
Claim 5
Dependent Claim 83 words
The multiplier as set forth in claim 2, further including at least two sample and hold circuits, wherein both of said circuits are connected to be simultaneously activated upon the receipt of a tRigger pulse from said comparator with each of said sample and hold circuits being connected to said source of alternating current, one circuit connected for zero degree phase angle reception and the other circuit connected for 90* phase angle reception thus providing sine and cosine functions respectively as output signals.
Claim 6
Dependent Claim 74 words
The apparatus as set forth in claim 3, wherein the gating signal produced by the gate generator is of rectangular form, said analogue input signal takes the form of n pi cos Alpha sin theta where n pi represents the wavelength or number of radians over which the interferometer base covers and the angles Alpha and theta represent respectively, the angle of incidence and angle of azimuth of an input ray to the interferometer.
Claim 7
Dependent Claim 74 words
The apparatus as set forth in claim 4, wherein the gating signal produced by the gate generator is of rectangular form, said analogue input signal takes the form of n pi sin theta cos Alpha where n pi represents the wavelength or number of radians over which the interferometer base covers and the angles Alpha and theta represent respectively, the angle of incidence and angle of azimuth of an input ray to the interferometer.

References Cited (Backward Citations)

US3187169A Cited
US3384738A Cited
US3430855A Cited
US3459932A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-01-11 1974-07-13 1975-01-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-01-11 1978-07-13 1979-01-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-01-11 1982-07-13 1983-01-12 $7700.00 Window Closed / Lapsed

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