US3553484A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Pulse generator with time delay
Assignee: International Standard Electric Corp
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Filing: 1968-03-06
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Granted: 1971-01-05
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Expires: 1988-03-06
Abstract
Abstract A multistage transistor time-delay pulse generator in which the delay between stages conventionally produced by R-C networks is achieved by using the storage time phenomenon of transistors, and the capacitors are eliminated. In one embodiment a chain of three transistors stages are coupled solely by resistors with the last transistor feeding back to the base of the first transistor. Other embodiments use diodes or transistors instead of the resistors and in one such other embodiment instead of single transistors between successive stages a pair of transistors in tandem is employed.
Inventors
- 👤 Gerhard Guenter Gassmann
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 01:02
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/13; H03K5/01; H03K5/04
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
180 words
A self contained oscillating pulse generator comprising: 2N + 1 successive stages, where N is an integer equal to or greater than 1, each stage containing a switching transistoR that switches between a saturated conducting condition and a nonconducting condition, said transistor having an emitter, base and collector; means for DC coupling the collector of each said switching transistor to the base of the next succeeding switching transistor, the first stage switching transistor serving as the next succeeding switching transistor for the last stage switching transistor; and means for biasing each transistor stage to provide that the switching of one said switching transistors to the nonconducting condition causes the next succeeding switching transistor to immediately switch to the saturated conducting condition, and the switching of one of said switching transistors to the saturated conducting condition causes the next succeeding switching transistor to switch to the nonconducting condition after a time interval determined by a storage time delay of the next succeeding switching transistor, whereby the frequency of said generator is determined by said storage time delay of each transistor stage.
Claim 2
Dependent Claim
180 words
A self contained oscillating pulse generator comprising: 2N + 1 successive stages, where N is an integer equal to or greater than 1, each stage containing a switching transistoR that switches between a saturated conducting condition and a nonconducting condition, said transistor having an emitter, base and collector; means for DC coupling the collector of each said switching transistor to the base of the next succeeding switching transistor, the first stage switching transistor serving as the next succeeding switching transistor for the last stage switching transistor; and means for biasing each transistor stage to provide that the switching of one said switching transistors to the nonconducting condition causes the next succeeding switching transistor to immediately switch to the saturated conducting condition, and the switching of one of said switching transistors to the saturated conducting condition causes the next succeeding switching transistor to switch to the nonconducting condition after a time interval determined by a storage time delay of the next succeeding switching transistor, whereby the frequency of said generator is determined by said storage time delay of each transistor stage.
Claim 3
Dependent Claim
27 words
A pulse generator according to claim 8 further including means for varying said bias means to control the extent of saturation and thereby said storage time delay.
Claim 4
Dependent Claim
15 words
A pulse generator according to claim 8 wherein said coupling means are substantially purely resistive.
Claim 5
Dependent Claim
17 words
A pulse generator according to claim 8 wherein said coupling means consist solely of semiconductors and resistors.
Claim 6
Dependent Claim
12 words
A pulse generator according to claim 4 wherein said semiconductors are diodes.
Claim 7
Dependent Claim
12 words
A pulse generator according to claim 4 wherein said semiconductors are transistors.
Claim 8
Dependent Claim
27 words
A pulse generator according to claim 4 wherein said semiconductors are a plurality of transistors in tandem and diodes, interconnected to constitute a solid state coupling network.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-01-04 | 1974-07-06 | 1975-01-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-01-04 | 1978-07-06 | 1979-01-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-01-04 | 1982-07-06 | 1983-01-05 | $7700.00 | Window Closed / Lapsed |