Shift/count control circuit

Claim 1

IN A BINARY ENCODER FOR GENERATING CODE WORD PATTERNS FOR INFORMATION RUN LENGTHS IN ACCORDANCE WITH THE STATISTICAL PROBABILITY OF OCCURRENCE THEREOF, SAID BINARY ENCODER INCLUDING SHIFT REGISTER MEANS FOR MONITORING THE INPUT BINARY DIGITS OF A FIRST AND SECOND BINARY LEVEL, FORMAT GENERATING MEANS FOR GENERATING SIGNALS STEPS IN ACCORDANCE WITH A PREDETERMINED CODE BASED ON THE PROBABILITY OF OCCURRENCE OF SAID RUN LENGTHS, AND SHIFT REGISTER-COUNTER MEANS COUPLED TO SAID SHIFT REGISTER MEANS FOR GENERATING SAID CODE WORD PATTERNS, A SHIFT/COUNT CONTROL COMPRISING: A FIRST PLURALITY OF GATING MEANS RESPONSIVE TO BINARY DIGITS OF A FIRST BINARY LEVEL IN CONJUCTION WITH A PREDETERMINED FORMAT LEVEL FROM SAID FORMAT GENERATOR FOR GENERATION OF A COUNT ENABLE SIGNAL TO SAID SHIFT REGISTER-COUNTER MEANS, A SECOND PLURALITY OF GATING MEANS RESPONSIVE TO PREDETERMINE PATTERNS OF BINARY DIGITS IN SAID SHAFT REGISTER/COUNTER MEANS AND TO FORMAT LEVELS GENERATED BY SAID FORMAT GENERATOR IN CONJUNCTION WITH THE DETECTED RUN LENGTHS OF INFORMATION BINARY DIGITS FOR GENERATING A SHIFT ENABLE SIGNAL TO SAID SHIFT REGISTER/ COUNTER MEANS, AND A THIRD PLURALITY OF GATING MEANS RESPONSIVE TO THE LEVEL OF BINARY INFORMATION MONITORED AT THE SHIIFT REGISTER MEANS FOR GENERATING A FIRST AND SECOND SHIFT LEVEL SIGNAL TO BE SHIFTED INTO SAID SHIFT REGISTER/COUNTER MEANS IN RESPONSE TO SAID SHIFT ENABLE SIGNAL.