Analog computer for determining the proportion of one response to a sum of responses

Claim 1

APPARATUS FOR NORMALIZING A PAIR OF SEQUENTIAL SIGNALS WHICH COMPRISES FIRST, SECOND, AND THIRD CONDENSERS; SWITCHING MEANS CONSTRUCTED AND ARRANGED TO CHARGE THE FIRST SEQUENTIAL SIGNAL TO SAID FIRST AND THIRD CONDENSERS, AND THE SECOND SEQUENTIAL SIGNAL TO SAID SECOND AND THIRD CONDENSERS, WHEREBY THE CHARGE ON THE THIRD CONDENSER REPRESENTS THE SUM OF SAID SIGNALS; FIRST, SECOND, AND THIRD RESISTORS SIZED TO REDUCE THE CHARGES ON THE RESPECTIVE CONDENSERS BY A CONSTANT FACTOR PER UNIT OF TIME; MEANS TO SENSE THE POTENTIAL ACROSS SAID THIRD CONDENSER; SECOND SWITCHING MEANS CONNECTED TO SAID RESISTORS, SAID CONDENSERS AND SAID SENSING MEANS, SAID SECOND SWITCHING MEANS BEING ARRANGED TO CONNECT SAID RESISTORS IN PARALLEL WITH THE RESPECTIVE CAPACITORS AFTER THEY HAVE BEEN CHARGED BY SAID SIGNALS, WHEREBY THE CHARGE ON SAID CAPACITORS IS REDUCED, SAID SECOND SWITCHING MEANS THEREAFTER BEING ACTUATED BY SAID SENSING MEANS TO DISCONNECT SAID RESISTORS FROM THE CAPACITORS WHEN THE CHARGE ON SAID THIRD CAPACITOR FALLS TO A PREDETERMINED VALUE, WHEREBY THE CHARGES