Clocked r-s flip-flop

Claim 1

IN A SET-RESET FLIP-FLOP HAVING FIRST AND SECOND LEVEL SHIFTING TRANSISTOR MEANS CROSS-COUPLED TO FIRST AND SECOND HOLDING TRANSISTOR MEANS, SET AND RESET TRANSISTOR MEANS CONNECTED RESPECTIVELY TO THE FIRST AND SECOND LEVEL SHIFTING TRANSISTOR MEANS AND CONNECTED IN PARALLEL RESPECTIVELY WITH SAID FIRST AND SECOND HOLDING TRANSISTOR MEANS, AND MEANS FOR BIASING ONE OF THE FIRST AND SECOND HOLDING TRANSISTOR MEANS NONCONDUCTING WHEN THE FLIP-FLOP IS IN ONE OF ITS TWO STABLE STATES, THE IMPROVEMENT COMPRISING: (A) A THIRD HOLDING TRANSISTOR MEANS CONNECTED TO SAID FIRST HOLDING TRANSISTOR MEANS AND CONNECTED IN PARALLEL WITH SAID SET TRANSISTOR MEANS, (B) A FOURTH HOLDING TRANSISTOR MEANS CONNECTED TO SAID SECOND HOLDING TRANSISTOR MEANS AND CONNECTED IN PARALLEL WITH SAID RESET TRANSISTOR MEANS, SAID FIRST AND SECOND HOLDING TRANSISTOR MEANS CONNECTED TO A FIRST CURRENT OUTPUT POINT AND SAID THIRD AND FOURTH HOLDING TRANSISTOR MEANS CONNECTED TO A SECOND CURRENT OUTPUT POINT, (C) A REFERENCE TRANSISTOR CONNECTED BETWEEN SAID FIRST CURRENT OUTPUT POINT AND A REFERENCE VOLTAGE AND PROVIDING A CURRENT PATH FROM ONE OF SAID FIRST AND SECOND HOLDING TRANSISTORS WHEN SAID FLIP-FLOP IS IN ONE OF ITS TWO STABLE STATES, AND (D) A CLOCKING TRANSISTOR MEANS CONNECTED BETWEEN SAID SECOND CURRENT OUTPUT POINT AND SAID REFERENCE TRANSISTOR MEANS AT A THIRD CURRENT OUTPUT POINT, SAID CLOCKING TRANSISTOR MEANS CONNECTABLE TO A SOURCE OF CLOCK TRANSISTORS FOR PROVIDING A CURRENT PATH FROM SAID FLIP-FLOP AT SAID SECOND CURRENT OUTPUT POINT WHEN SAID CLOCK TRANSISTORS REACH A PREDETERMINED VOLTAGE LEVEL WITH RESPECT TO SAID REFERENCE VOLTAGE.