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US3363233A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital comparison element

Assignee: Licentia Patent Verwaltungs GmbH
•
Filing: 1967-02-02
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Granted: 1968-01-09
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Expires: 1987-02-02
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Abstract

No abstract record available.

Inventors

  • 👤 Petzold Dieter

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 04:56
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/02; G06F7/026

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 280 words
IN A DIGITAL COMPARISON ELEMENT FOR COMPARING TWO SERIES OF SIGNALS WHICH REPRESENT NUMBERS, WHICH SERIES OF SIGNALS ARE ARRANGED IN MULTI-DIGIT SIGNAL GROUPS, THERE BEING FIRST MEANS FOR TESTING WHETHER OR NOT THERE IS COINCIDENCE OF SIGNAL REPRESENTATION OF SAID NUMBERS AND FORMING A FIRST INTERMEDIATE SIGNAL, SECOND MEANS FOR TESTING THE ALGEBRAIC SIGN OF THE DIFFERENCE BETWEEN SAID SIGNAL REPRESENTATIONS OF SAID NUMBERS AND FORMING A SECOND INTERMEDIATE SIGNAL, SAID FIRST AND SECOND MEANS BEING CONSTITUTED, RESPECTIVELY, BY TWO LOGIC INPUT CIRCUITS WHICH EACH SIGNAL GROUP HAS ASSOCIATED WITH IT AND WHICH INPUT CIRCUITS ARE CONTROLLED BY THE SIGNALS OF THE RESPECTIVE SIGNAL GROUP, THERE FURTHER BEING THIRD MEANS FOR PUTTING OUT A COINCIDENCE SIGNAL AND AN ALGEBRAIC SIGN SIGNAL, SAID THIRD MEANS BEING CONSTITUTED BY TWO LOGIC OUTPUT CIRCUITS WHICH ARE CONTROLLED BY THE INTERMEDIATE SIGNALS OF ALL OF SAID LOGIC INPUT CIRCUITS, WHEREIN THE IMPROVEMENT COMPRISES THE ARRANGEMENT THAT EACH SIGNAL GROUP ENCOMPASS TWO OR THREE BINARY DIGITS AND EACH LOGIC INPUT CIRCUIT FOR TESTING FOR COINCIDENCE HAS, FOR EACH BINARY DIGIT OF THE SIGNAL GROUP, TWO INPUT ANDCIRCUITS WHICH ARE CONTROLLED BY THE SIGNALS OF THE RESPECTIVE SIGNAL GROUP, THERE BEING OR/NOT-CIRCUIT MEANS FOR COMBINING THE OUTPUT SIGNALS OF ALL OF SAID AND-CIRCUITS INTO SAID FIRST INTERMEDIATE SIGNAL; SAID IMPROVEMENT FURTHER COMPRISING THE ARRANGEMENT THAT THE LOGIC INPUT CIRCUIT WHICH PERTAINS TO THE SIGNAL GROUP AND WHICH IS PROVIDED FOR TESTING THE ALGEBRAIC SIGN OF THE DIFFERENCE HAS INPUT AND-CIRCUITS WHOSE NUMBER IS DETERMINED BY THE NUMBER OF BINARY DIGITS OF THE SIGNAL GROUP, THERE BEING OR/NOT CIRCUIT MEANS FOR COMBINING THE OUTPUT SIGNALS OF ALL OF SAID LAST-MENTIONED ANDCIRCUITS INTO SAID SECOND INTERMEDIATE SIGNAL.
Claim 2
Dependent Claim 280 words
IN A DIGITAL COMPARISON ELEMENT FOR COMPARING TWO SERIES OF SIGNALS WHICH REPRESENT NUMBERS, WHICH SERIES OF SIGNALS ARE ARRANGED IN MULTI-DIGIT SIGNAL GROUPS, THERE BEING FIRST MEANS FOR TESTING WHETHER OR NOT THERE IS COINCIDENCE OF SIGNAL REPRESENTATION OF SAID NUMBERS AND FORMING A FIRST INTERMEDIATE SIGNAL, SECOND MEANS FOR TESTING THE ALGEBRAIC SIGN OF THE DIFFERENCE BETWEEN SAID SIGNAL REPRESENTATIONS OF SAID NUMBERS AND FORMING A SECOND INTERMEDIATE SIGNAL, SAID FIRST AND SECOND MEANS BEING CONSTITUTED, RESPECTIVELY, BY TWO LOGIC INPUT CIRCUITS WHICH EACH SIGNAL GROUP HAS ASSOCIATED WITH IT AND WHICH INPUT CIRCUITS ARE CONTROLLED BY THE SIGNALS OF THE RESPECTIVE SIGNAL GROUP, THERE FURTHER BEING THIRD MEANS FOR PUTTING OUT A COINCIDENCE SIGNAL AND AN ALGEBRAIC SIGN SIGNAL, SAID THIRD MEANS BEING CONSTITUTED BY TWO LOGIC OUTPUT CIRCUITS WHICH ARE CONTROLLED BY THE INTERMEDIATE SIGNALS OF ALL OF SAID LOGIC INPUT CIRCUITS, WHEREIN THE IMPROVEMENT COMPRISES THE ARRANGEMENT THAT EACH SIGNAL GROUP ENCOMPASS TWO OR THREE BINARY DIGITS AND EACH LOGIC INPUT CIRCUIT FOR TESTING FOR COINCIDENCE HAS, FOR EACH BINARY DIGIT OF THE SIGNAL GROUP, TWO INPUT ANDCIRCUITS WHICH ARE CONTROLLED BY THE SIGNALS OF THE RESPECTIVE SIGNAL GROUP, THERE BEING OR/NOT-CIRCUIT MEANS FOR COMBINING THE OUTPUT SIGNALS OF ALL OF SAID AND-CIRCUITS INTO SAID FIRST INTERMEDIATE SIGNAL; SAID IMPROVEMENT FURTHER COMPRISING THE ARRANGEMENT THAT THE LOGIC INPUT CIRCUIT WHICH PERTAINS TO THE SIGNAL GROUP AND WHICH IS PROVIDED FOR TESTING THE ALGEBRAIC SIGN OF THE DIFFERENCE HAS INPUT AND-CIRCUITS WHOSE NUMBER IS DETERMINED BY THE NUMBER OF BINARY DIGITS OF THE SIGNAL GROUP, THERE BEING OR/NOT CIRCUIT MEANS FOR COMBINING THE OUTPUT SIGNALS OF ALL OF SAID LAST-MENTIONED ANDCIRCUITS INTO SAID SECOND INTERMEDIATE SIGNAL.

References Cited (Backward Citations)

US2885655A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1971-01-08 1971-07-10 1972-01-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1975-01-08 1975-07-10 1976-01-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1979-01-08 1979-07-10 1980-01-09 $7700.00 Window Closed / Lapsed

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