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US3361955A Expired / Lapsed US ⏱️ 0.0 years remaining

Current limiting for power supply switching transistors

Assignee: Telefunken Patentverwertungs GmbH
•
Filing: 1965-09-07
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Granted: 1968-01-02
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Expires: 1985-09-07
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Abstract

No abstract record available.

Inventors

  • 👤 Typke Jurgen

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 18:59
CPC Classifications
H; H02; H02M; H02M3/00; H02M3/02; H02M3/04; H02M3/10; H02M3/145; H02M3/155; H02M3/156; H02M3/1563

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 378 words
IN A REGULATED POWER SUPPLY, WHEREIN THE PRIMARY WINDING OF A TRANSFORMER, THE COLLECTOR-EMITTER SWITCHING PATH OF A FIST SWITCHING TRANSISTOR, AND A CAPACITOR ARE CONNECTED IN SERIES ACROSS THE INPUT TERMINALS OF SAID REGULATED POWER SUPPLY, THE PRIMARY WINDINGS BEING CONNECTED TO ONE OF THE INPUT TERMINALS, THE OUTPUT APPEARING ACROSS THE CAPACITOR, THE BASE OF THE FIRST SWITCHING TRANSISTOR BEING CONNECTED THROUGH A FIRST RESISTOR TO THE ONE INPUT TEMINAL AND ALSO TO A CONTROL DEVICE CONNECTED ACROSS THE CAPACITOR, WHICH OPERATES PERIODICALLY DEPENDING ON THE OUTPUT VOLTAGE AT THE CAPACITOR, AND WHEREIN A RECTIFIER HAVING FIRST AND SECOND ELECTRODES HAS THE FIRST ELECTRODE CONNECTED TO ONE TERMINAL OF THE SECONDARY WINDING OF THE TRANSFORMER, THE OTHER TERMINAL OF THE SECONDARY WINDING BEING CONNECTED TO THE OTHER INPUT TERMINAL, THE IMPROVEMENT COMPRISING A CURRENT LIMITING CIRCUIT INCLUDING: (1) MEANS FORMING (A) A RESISTANCE PATH INCORPORATED IN THE SERIES CIRCUIT AND INTERPOSED BETWEEN THE CAPACITOR AND THE EMITTER OF THE FIRST TRANSISTOR, AND (B) A RESISTANCE PATH CONNECTED BETWEEN THE EMITTER OF THE FIRST TRANSISTOR AND THE SECOND ELECTRODE OF THE RECTIFIER; (2) A SECOND TRANSISTOR; (3) A SECOND TRANSISTOR HAVING ONE TERMINAL CONNECTED TO THE BASE OF SAID SECOND TRANSISTOR AND THE OTHER TERMINAL CONNECTED TO THE SECOND ELECTRODE TO THE RECTIFIER; (4) A THIRD RESISTOR HAVING ONE TERMINAL CONNECTED TO THE BASE OF SAID SECOND TRANSISTOR AND THE OTHER TERMINAL TO THE FIRST ELECTRODE OF THE RECTIFIER; (5) A FOURTH RESISTOR HAVING ONE TERMINAL CONNECTED TO THE BASE OF SAID SECOND TRANSISTOR AND THE OTHER TERMINAL CONNECTED TO THE JUNCTION BETWEEN THE CAPACITOR AND SAID RESISTANCE PATH (A) AND ALSO TO THE EMITTER OF SAID SECOND TRANSISTOR; AND (6) A DIODE HAVING ONE ELECTRODE CONNECTED TO THE COLLECTOR OF SAID SECOND TRANSISTOR AND THE OTHER ELECTRODE CONNECTED TO THE BASE OF THE FIRST TRANSISTOR AND ALSO TO ONE TERMINAL OF THE FIRST RESISTOR; (7) THE RELATIONSHIP BETWEEN THE NUMBER OF TURNS N1 IN THE PRIMARY WINDING, THE NUMBER OF TURNS N2 IN THE SECONDARY WINDING, THE RESISTANCE R1 OF THE RESISTANCE PATH (A) CONNECTED BETWEEN THE EMITTER OF THE FIRST TRANSISTOR AND THE CAPACITOR, AND THE RESISTANCE R2 OF THE RESISTANCE PATH (B) CONNECTED BETWEEN THE EMITTER OF THE FIRST TRANSISTOR AND THE RECTIFIER, BEING
Claim 2
Dependent Claim 378 words
IN A REGULATED POWER SUPPLY, WHEREIN THE PRIMARY WINDING OF A TRANSFORMER, THE COLLECTOR-EMITTER SWITCHING PATH OF A FIST SWITCHING TRANSISTOR, AND A CAPACITOR ARE CONNECTED IN SERIES ACROSS THE INPUT TERMINALS OF SAID REGULATED POWER SUPPLY, THE PRIMARY WINDINGS BEING CONNECTED TO ONE OF THE INPUT TERMINALS, THE OUTPUT APPEARING ACROSS THE CAPACITOR, THE BASE OF THE FIRST SWITCHING TRANSISTOR BEING CONNECTED THROUGH A FIRST RESISTOR TO THE ONE INPUT TEMINAL AND ALSO TO A CONTROL DEVICE CONNECTED ACROSS THE CAPACITOR, WHICH OPERATES PERIODICALLY DEPENDING ON THE OUTPUT VOLTAGE AT THE CAPACITOR, AND WHEREIN A RECTIFIER HAVING FIRST AND SECOND ELECTRODES HAS THE FIRST ELECTRODE CONNECTED TO ONE TERMINAL OF THE SECONDARY WINDING OF THE TRANSFORMER, THE OTHER TERMINAL OF THE SECONDARY WINDING BEING CONNECTED TO THE OTHER INPUT TERMINAL, THE IMPROVEMENT COMPRISING A CURRENT LIMITING CIRCUIT INCLUDING: (1) MEANS FORMING (A) A RESISTANCE PATH INCORPORATED IN THE SERIES CIRCUIT AND INTERPOSED BETWEEN THE CAPACITOR AND THE EMITTER OF THE FIRST TRANSISTOR, AND (B) A RESISTANCE PATH CONNECTED BETWEEN THE EMITTER OF THE FIRST TRANSISTOR AND THE SECOND ELECTRODE OF THE RECTIFIER; (2) A SECOND TRANSISTOR; (3) A SECOND TRANSISTOR HAVING ONE TERMINAL CONNECTED TO THE BASE OF SAID SECOND TRANSISTOR AND THE OTHER TERMINAL CONNECTED TO THE SECOND ELECTRODE TO THE RECTIFIER; (4) A THIRD RESISTOR HAVING ONE TERMINAL CONNECTED TO THE BASE OF SAID SECOND TRANSISTOR AND THE OTHER TERMINAL TO THE FIRST ELECTRODE OF THE RECTIFIER; (5) A FOURTH RESISTOR HAVING ONE TERMINAL CONNECTED TO THE BASE OF SAID SECOND TRANSISTOR AND THE OTHER TERMINAL CONNECTED TO THE JUNCTION BETWEEN THE CAPACITOR AND SAID RESISTANCE PATH (A) AND ALSO TO THE EMITTER OF SAID SECOND TRANSISTOR; AND (6) A DIODE HAVING ONE ELECTRODE CONNECTED TO THE COLLECTOR OF SAID SECOND TRANSISTOR AND THE OTHER ELECTRODE CONNECTED TO THE BASE OF THE FIRST TRANSISTOR AND ALSO TO ONE TERMINAL OF THE FIRST RESISTOR; (7) THE RELATIONSHIP BETWEEN THE NUMBER OF TURNS N1 IN THE PRIMARY WINDING, THE NUMBER OF TURNS N2 IN THE SECONDARY WINDING, THE RESISTANCE R1 OF THE RESISTANCE PATH (A) CONNECTED BETWEEN THE EMITTER OF THE FIRST TRANSISTOR AND THE CAPACITOR, AND THE RESISTANCE R2 OF THE RESISTANCE PATH (B) CONNECTED BETWEEN THE EMITTER OF THE FIRST TRANSISTOR AND THE RECTIFIER, BEING

References Cited (Backward Citations)

US3088067A Cited
US3109941A Cited
FR1299729A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1971-01-01 1971-07-03 1972-01-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1975-01-01 1975-07-03 1976-01-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1979-01-01 1979-07-03 1980-01-02 $7700.00 Window Closed / Lapsed

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