Binary magnetic recording system

Claim 1

A DEVICE FOR ROCORDING INFORMATION ON A MAGNETIC SUPPORT AND FOR READING THE INFORMATION THUS RECORDED, SAID RECORDING BEING EFFECTED IN PURE BINARY CODE, WHICH DEVICE COMPRISES, IN COMBINATION: RECORDING MEANS COMPRISING, ON THE ONE HAND, FOR EACH BINARY ORDER INDIVIDUALLY, A REGISTER UNIT HAVING AN INPUT RECEIVING THE SUCCESSIVE BITS OF THE CORRESPONDING ORDER AND TWO OUTPUTS SUPPLYING OPPOSED SIGNALS, ONE OF WHICH REPRESENTS THE RECEIVED BIT AND THE OTHER OF WHICH REPRESENTS THE NEGATION OF THIS BIT, AN "EXCLUSIVE OR" UNIT COMPRISING TWO "AND" SUB-UNITS AND AN "INCLUSIVE OR" SUB-UNIT, EACH SAID SUB-UNIT HAVING TWO INPUTS AND AN OUTPUT, SAID TWO "AND" SUB-UNITS BEING MOUNTED IN PARALLEL AND HAVING THEIR OUTPUTS EACH CONNECTED TO ONE OF THE INPUT OF SAID "INCLUSIVE OR" OR" SUB-UNIT, THE OUTPUT OF SAID "INCLUSIVE OR" SUB-UNIT FORMING THE OUTPUT OF SAID "EXCLUSIVE OR" UNIT, A FIRST CURRENT GENERATOR STARTED BY THE OUTPUT OF THE "EXCLUSIVE OR" UNIT, AND A PHASE MODULATION INFORMATION BIT RECORDING HEAD, EXCITED BY THE OUTPUT OF SAID FIRST GENERATOR, AND, ON THE OTHER HAND, FOR ALL THE BINARY ORDERS COLLECTIVELY, A ZERO RESETTING PULSE GENERATOR CONNECTED WITH EVERY RESISTER UNIT FOR PERIODICALLY RESETTING IT TO ZERO WITH A RECURRENCE PERIOD EQUAL TO THAT OF THE INFORMATION RECEIVED, A PILOT UNIT, STARTED BY SAID ZERO RESETTING PULSES, FOR DELIVERING A PAIR OF OPPOSED SIGNALS WITH THE SAME RECURRENCE PERIOD BUT WITH A DELAY, SHORTER THAN THE DURATION OF THIS PERIOD, WITH RESPECT TO THE ZERO RESETTING PULSES, THE FIRST SIGNAL OF EVERY PAIR OF SIGNALS DELIVERED BY THE PILOT UNIT BEING FED TO ONE OF THE TWO INPUTS OF ONE OF THE "AND" SUB-UNITS OF ALL THE "EXCLUSIVE OR" UNITS, THE OTHER INPUT OF THIS SUB-UNIT BEING FED BY THE SECOND SIGNAL FROM THE REGISTER UNIT OF THE SAME BINARY ORDER, WHEREAS THE SECOND SIGNAL OF EVERY PAIR OF SIGNALS DELIVERED BY THE PILOT UNIT FEEDS ONE OF THE TWO INPUTS OF THE OTHER "AND" SUB-UNIT OF ALL THE "EXCLUSIVE OR" UNITS, THE OTHER INPUT OF THESE OTHER "AND" UNITS BEING FED BY THE FIRST SIGNAL OF THE REGISTER UNIT OF THE SAME ORDER, A SECOND CURRENT GENERATOR STARTED BY ONE OF THE TWO OUTPUT SIGNALS OF THE PILOT UNIT, AND A PHASE MODULATION INFORMATION BIT RECORDING HEAD ENERGIZED BY THE OUTPUT OF SAID SECOND GENERATOR, AND READING MEANS COMPRISING, ON THE ONE HAND FOR EACH BINARY ORDER INDIVIDUALLY, A PHASE MODULATION RECORDED INFORMATION BIT READIN HEAD, A FIRST SHAPING UNIT HAVING AN INPUT CONNECTED TO SAID INFORMATION BIT READING HEAD AND ADAPTED TO PRODUCE SHAPED NEGATIVE AND POSITIVE PULSES, A REGISTER UNIT CONNECTED TO SAID FIRST SHAPING UNIT FOR RECEIVING SAID SHAPED PULSES AND FOR DELIVERIN A USABLE BIT PULSE FOR THE CORRESPONDING BINARY ORDER, AND, ON THE OTHER HAND, FOR ALL THE BINARY ORDERS COLLECTIVELY, A PHASE MODULATION RECORDED REFERENCE BIT READING HEAD, A SECOND SHAPING UNIT HAVING AN INPUT CONNECTED TO SAID REFERENCE BIT READING HEAD FOR SHAPING THE READ REFERENCE BITS, SAID REFERENCE BIT READING HEAD AND SAID SECOND SHAPING UNIT BEING ANALOGOUS TO THE CORRESPONDING INFORMATION BIT READING HEAD AND FIRST SHAPING UNIT, A PILOT UNIT CONNECTED TO EVERY REGISTER UNIT OF SAID READING MEANS FOR SYNCHRONIZING THE OUTPUT OF THE INFORMATION BITS THAT HAVE BEEN READ, AND A GENERATOR CONNECTED TO EVERY REGISTER UNIT OF SAID READING MEANS FOR RESETTING THESE REGISTER UNITS TO ZERO AFTER DELIVERY OF THE BITS OF ALL THE BINARY ORDERS.

Claim 2

A DEVICE FOR ROCORDING INFORMATION ON A MAGNETIC SUPPORT AND FOR READING THE INFORMATION THUS RECORDED, SAID RECORDING BEING EFFECTED IN PURE BINARY CODE, WHICH DEVICE COMPRISES, IN COMBINATION: RECORDING MEANS COMPRISING, ON THE ONE HAND, FOR EACH BINARY ORDER INDIVIDUALLY, A REGISTER UNIT HAVING AN INPUT RECEIVING THE SUCCESSIVE BITS OF THE CORRESPONDING ORDER AND TWO OUTPUTS SUPPLYING OPPOSED SIGNALS, ONE OF WHICH REPRESENTS THE RECEIVED BIT AND THE OTHER OF WHICH REPRESENTS THE NEGATION OF THIS BIT, AN "EXCLUSIVE OR" UNIT COMPRISING TWO "AND" SUB-UNITS AND AN "INCLUSIVE OR" SUB-UNIT, EACH SAID SUB-UNIT HAVING TWO INPUTS AND AN OUTPUT, SAID TWO "AND" SUB-UNITS BEING MOUNTED IN PARALLEL AND HAVING THEIR OUTPUTS EACH CONNECTED TO ONE OF THE INPUT OF SAID "INCLUSIVE OR" OR" SUB-UNIT, THE OUTPUT OF SAID "INCLUSIVE OR" SUB-UNIT FORMING THE OUTPUT OF SAID "EXCLUSIVE OR" UNIT, A FIRST CURRENT GENERATOR STARTED BY THE OUTPUT OF THE "EXCLUSIVE OR" UNIT, AND A PHASE MODULATION INFORMATION BIT RECORDING HEAD, EXCITED BY THE OUTPUT OF SAID FIRST GENERATOR, AND, ON THE OTHER HAND, FOR ALL THE BINARY ORDERS COLLECTIVELY, A ZERO RESETTING PULSE GENERATOR CONNECTED WITH EVERY RESISTER UNIT FOR PERIODICALLY RESETTING IT TO ZERO WITH A RECURRENCE PERIOD EQUAL TO THAT OF THE INFORMATION RECEIVED, A PILOT UNIT, STARTED BY SAID ZERO RESETTING PULSES, FOR DELIVERING A PAIR OF OPPOSED SIGNALS WITH THE SAME RECURRENCE PERIOD BUT WITH A DELAY, SHORTER THAN THE DURATION OF THIS PERIOD, WITH RESPECT TO THE ZERO RESETTING PULSES, THE FIRST SIGNAL OF EVERY PAIR OF SIGNALS DELIVERED BY THE PILOT UNIT BEING FED TO ONE OF THE TWO INPUTS OF ONE OF THE "AND" SUB-UNITS OF ALL THE "EXCLUSIVE OR" UNITS, THE OTHER INPUT OF THIS SUB-UNIT BEING FED BY THE SECOND SIGNAL FROM THE REGISTER UNIT OF THE SAME BINARY ORDER, WHEREAS THE SECOND SIGNAL OF EVERY PAIR OF SIGNALS DELIVERED BY THE PILOT UNIT FEEDS ONE OF THE TWO INPUTS OF THE OTHER "AND" SUB-UNIT OF ALL THE "EXCLUSIVE OR" UNITS, THE OTHER INPUT OF THESE OTHER "AND" UNITS BEING FED BY THE FIRST SIGNAL OF THE REGISTER UNIT OF THE SAME ORDER, A SECOND CURRENT GENERATOR STARTED BY ONE OF THE TWO OUTPUT SIGNALS OF THE PILOT UNIT, AND A PHASE MODULATION INFORMATION BIT RECORDING HEAD ENERGIZED BY THE OUTPUT OF SAID SECOND GENERATOR, AND READING MEANS COMPRISING, ON THE ONE HAND FOR EACH BINARY ORDER INDIVIDUALLY, A PHASE MODULATION RECORDED INFORMATION BIT READIN HEAD, A FIRST SHAPING UNIT HAVING AN INPUT CONNECTED TO SAID INFORMATION BIT READING HEAD AND ADAPTED TO PRODUCE SHAPED NEGATIVE AND POSITIVE PULSES, A REGISTER UNIT CONNECTED TO SAID FIRST SHAPING UNIT FOR RECEIVING SAID SHAPED PULSES AND FOR DELIVERIN A USABLE BIT PULSE FOR THE CORRESPONDING BINARY ORDER, AND, ON THE OTHER HAND, FOR ALL THE BINARY ORDERS COLLECTIVELY, A PHASE MODULATION RECORDED REFERENCE BIT READING HEAD, A SECOND SHAPING UNIT HAVING AN INPUT CONNECTED TO SAID REFERENCE BIT READING HEAD FOR SHAPING THE READ REFERENCE BITS, SAID REFERENCE BIT READING HEAD AND SAID SECOND SHAPING UNIT BEING ANALOGOUS TO THE CORRESPONDING INFORMATION BIT READING HEAD AND FIRST SHAPING UNIT, A PILOT UNIT CONNECTED TO EVERY REGISTER UNIT OF SAID READING MEANS FOR SYNCHRONIZING THE OUTPUT OF THE INFORMATION BITS THAT HAVE BEEN READ, AND A GENERATOR CONNECTED TO EVERY REGISTER UNIT OF SAID READING MEANS FOR RESETTING THESE REGISTER UNITS TO ZERO AFTER DELIVERY OF THE BITS OF ALL THE BINARY ORDERS.