Minority carrier storage flip-flop

Claim 1

A BISTABLE FLIP-FLOP CIRCUIT COMPRISING: AN AMPLIFYING CIRCUIT INCLUDING A TRANSISTOR HAVING A BASE, COLLECTOR AND EMITTER, SAID TRANSISTOR BEING CONNECTED IN GROUNDED EMITTER CONFIGURATION AND HAVING MINORITY CARRIER STORAGE CAPABILITY; SIGNAL INPUT CONNECTIONS TO SAID TRANSISTOR FOR MOMENTARILY APPLYING PREDETERMINED FIRST AND SECOND SIGNALS WHICH RESPECTIVELY INITIATE A CHANGE OF STATE OF SAID TRANSISTOR FROM CUTOFF TO CONDUCTION AND VICE VERSA; A SINUSOIDAL SIGNAL SOURCE; FIRST D.C. BIASING MEANS PERMANENTLY CONNECTED TO SAID COLLECTOR; SAID AMPLIFYING CIRCUIT INCLUDING A SEMICONDUCTOR GATE CONNECTED TO SAID FIRST BIASING MEANS AND INTERPOSED BETWEEN SAID SIGNAL SOURCE AND SAID BASE, SAID BIASING MEANS NORMALLY BIASING SAID GATE TO BE OPEN; SAID GATE BEING CLOSED IN RESPONSE TO THE TRANSISTOR ASSUMING SAID CONDUCTING STATE UPON APPLICATION OF SAID FIRST MOMENTARY SIGNAL TO EFFECTIVELY CONNECT SAID SOURCE TO SAID BASE, AND SAID TRANSISTOR THEREUPON BEING MAINTAINED IN SAID CONDUCTING STATE DUE TO THE INJECTION INTO SAID TRANSISTOR OF MINORITY CARRIERS IN RESPONSE TO SAID CONNECTION OF SAID SOURCE TO SAID BASE; AND SECOND D.C. BIASING MEANS PERMANENTLY CONNECTED TO SAID TRANSISTOR AND EFFECTIVE IN RESPONSE TO SAID TRANSISTOR ASSUMING SAID CUTOFF STATE UPON APPLICATION OF SAID SECOND MOMENTARY SIGNAL TO MAINTAIN SAID TRANSISTOR IN SAID CUTOFF STATE.