US3346699A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Stereophonic radio circuit including phasing circuit for providing reconstituted subcarrier signal
Assignee: General Electric Co
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Filing: 1964-10-23
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Granted: 1967-10-10
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Expires: 1984-10-23
Abstract
No abstract record available.
Inventors
- 👤 Csicsatka Antal
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 06:30
CPC Classifications
H; H03; H03D; H03D1/00; H03D1/22; H03D1/2209; H03D1/2218
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
451 words
A CIRCUIT FOR DERIVING STEREO SIGNALS FROM A COMPOSITE SIGNAL INCLUDING AS FREQUENCY COMPONENTS THEREOF A SUM COMBINATION OF THE STEREO SIGNALS, A DIFFERENCE COMBINATION OF THE STEREO SIGNALS AMPLITUDE MODULATED ON A SUPPRESSED CARRIER OF GIVEN FREQUENCY, AND A PILOT SIGNAL AT A FREQUENCY OF ONE-HALF SAID GIVEN FREQUENCY AND LYING IN A FREQUENCY GAP BETWEEN SAID SUM AND DIFFERENCEN COMBINATIONS OF STEREO SIGNALS, SAID CIRCUIT COMPRISING A SPLITLOAD AMPLIFIER HAVING AN INPUT ELECTRODE ADAPTED TO HAVE SAID COMPOSITE SIGNAL APPLIED THERETO AND HAVING FIRST AND SECOND LOAD CIRCUITS CONNECTED THERETO IN A SPLIT-LOAD ARRANGEMENT, SAID FIRST LAOD CIRCUIT COMPRISING A RESISTOR AND A FIRST PARALLEL RESONANT CIRCUIT CONNECTED IN SERIES AND SAID SECOND LOAD CIRCUIT COMPRISING A RESISTANCE ELEMENT, SAID FIRST PARALLEL RESONANT CIRCUIT BEING RESONANT AT THE FREQUENCY OF SAID PILOT SIGNAL, WHEREBY AN AMPLIFIED COMPOSITE SIGNAL IS PROVIDED IN SAID RESISTOR, A RELATIVELY MORE GREATLY AMPLIFIED PILOT SIGNAL IS PROVIDED IN SAID FIRST PARALLEL RESONANT CIRCUIT, AND A COMPOSITE SIGNAL IS PROVIDED IN SAID RESISTANCE ELEMENT AND HAVING OPPOSITE PHASE WITH RESPECT TO SAID COMPOSITE SIGNAL PROVIDED IN SAID RESISTOR, A SECOND PARALLEL RESONANT CIRCUIT RESONANT AT THE FREQUENCY OF SAID PILOT SIGNAL, A TIME DELAY NETWORK CONNECTED BETWEEN SAID FIRST AND SECOND PARALLEL RESONANT CIRCUITS TO APPLY SAID AMPLIFIED PILOT SIGNAL FROM THE FIRST TO THE SECOND PARALLEL RESONANT CIRCUIT, AN AMPLIFIER DEVICE NORMALLY IN THE CUT-OFF CONDITION AND HAVING AN INPUT ELECTRODE CONNECTED TO SAID SECOND PARALLEL RESONANT CIRCUIT AND HAVINA AN OUTPUT ELECTRODE, A THIRD PARALLEL RESONANT CIRCUIT RESONANT AT SAID GIVEN FREQUENCY OF THE SUPPRESSED CARRIER AND CONNECTED TO SAID OUTPUT ELECTRODE, SAID AMPLIFIER DEVICE BEING ADAPTED TO BE DRIVEN INTO CONDUCTION BY ALTERNATE HALF-CYCLES OF THE PILOT SIGNAL FROM SAID SECOND PARALLEL RESONANT CIRCUIT WHEREBY A SIGNAL OF SAID GIVEN FREQUENCY IS PRODUCED IN SAID THIRD PARALLEL RESONANT CIRCUIT, A STEREO DEMODULATOR CIRCUIT HAVING AN INPUT CIRCUIT CONNECTED TO RECEIVE SAID AMPLIFIED COMPOSITE SIGNAL FROM SAID RESISTOR AND ALSO CONNECTED TO RECEIVE SAID SIGNAL OF GIVEN FREQUENCY FROM SAID THIRD PARALLEL RESONANT CIRCUIT, SAID TIME DELAY NETWORK HAVING A VALUE OF TIME DELAY TO CAUSE SAID SIGNAL OF GIVEN FREQUENCY AT SAID INPUT CIRCUIT TO BE IN THE SAME PHASE AS SAID SUPPRESSED CARRIER WITH RESPECT TO SAID DIFFERENCE COMBINATION OF STEREO SIGNALS, SAID STEREO DEMODULATOR CIRCUIT HAVING TWO OUTPUT CIRCUITS AND BEING ADAPTED TO DERIVE SAID STEREO SIGNALS FROM SAID COMPOSITE SIGNAL UNDER THE CONTROL OF SAID SIGNAL OF GIVEN FREQUENCY AND PROVIDE SAID DERIVED STEREO SIGNALS RESPECTIVELY AT SAID OUTPUT CIRCUITS, AND MEANS FOR APPLYING AT LEAST A PORTION OF THE SUM COMBINATION SIGNAL FROM THE COMPOSITE SIGNAL AT SAID RESISTANCE ELEMENT TO SAID FIRST AND SECOND OUTPUT CIRCUITS, RESPECTIVELY.
Claim 2
Dependent Claim
451 words
A CIRCUIT FOR DERIVING STEREO SIGNALS FROM A COMPOSITE SIGNAL INCLUDING AS FREQUENCY COMPONENTS THEREOF A SUM COMBINATION OF THE STEREO SIGNALS, A DIFFERENCE COMBINATION OF THE STEREO SIGNALS AMPLITUDE MODULATED ON A SUPPRESSED CARRIER OF GIVEN FREQUENCY, AND A PILOT SIGNAL AT A FREQUENCY OF ONE-HALF SAID GIVEN FREQUENCY AND LYING IN A FREQUENCY GAP BETWEEN SAID SUM AND DIFFERENCEN COMBINATIONS OF STEREO SIGNALS, SAID CIRCUIT COMPRISING A SPLITLOAD AMPLIFIER HAVING AN INPUT ELECTRODE ADAPTED TO HAVE SAID COMPOSITE SIGNAL APPLIED THERETO AND HAVING FIRST AND SECOND LOAD CIRCUITS CONNECTED THERETO IN A SPLIT-LOAD ARRANGEMENT, SAID FIRST LAOD CIRCUIT COMPRISING A RESISTOR AND A FIRST PARALLEL RESONANT CIRCUIT CONNECTED IN SERIES AND SAID SECOND LOAD CIRCUIT COMPRISING A RESISTANCE ELEMENT, SAID FIRST PARALLEL RESONANT CIRCUIT BEING RESONANT AT THE FREQUENCY OF SAID PILOT SIGNAL, WHEREBY AN AMPLIFIED COMPOSITE SIGNAL IS PROVIDED IN SAID RESISTOR, A RELATIVELY MORE GREATLY AMPLIFIED PILOT SIGNAL IS PROVIDED IN SAID FIRST PARALLEL RESONANT CIRCUIT, AND A COMPOSITE SIGNAL IS PROVIDED IN SAID RESISTANCE ELEMENT AND HAVING OPPOSITE PHASE WITH RESPECT TO SAID COMPOSITE SIGNAL PROVIDED IN SAID RESISTOR, A SECOND PARALLEL RESONANT CIRCUIT RESONANT AT THE FREQUENCY OF SAID PILOT SIGNAL, A TIME DELAY NETWORK CONNECTED BETWEEN SAID FIRST AND SECOND PARALLEL RESONANT CIRCUITS TO APPLY SAID AMPLIFIED PILOT SIGNAL FROM THE FIRST TO THE SECOND PARALLEL RESONANT CIRCUIT, AN AMPLIFIER DEVICE NORMALLY IN THE CUT-OFF CONDITION AND HAVING AN INPUT ELECTRODE CONNECTED TO SAID SECOND PARALLEL RESONANT CIRCUIT AND HAVINA AN OUTPUT ELECTRODE, A THIRD PARALLEL RESONANT CIRCUIT RESONANT AT SAID GIVEN FREQUENCY OF THE SUPPRESSED CARRIER AND CONNECTED TO SAID OUTPUT ELECTRODE, SAID AMPLIFIER DEVICE BEING ADAPTED TO BE DRIVEN INTO CONDUCTION BY ALTERNATE HALF-CYCLES OF THE PILOT SIGNAL FROM SAID SECOND PARALLEL RESONANT CIRCUIT WHEREBY A SIGNAL OF SAID GIVEN FREQUENCY IS PRODUCED IN SAID THIRD PARALLEL RESONANT CIRCUIT, A STEREO DEMODULATOR CIRCUIT HAVING AN INPUT CIRCUIT CONNECTED TO RECEIVE SAID AMPLIFIED COMPOSITE SIGNAL FROM SAID RESISTOR AND ALSO CONNECTED TO RECEIVE SAID SIGNAL OF GIVEN FREQUENCY FROM SAID THIRD PARALLEL RESONANT CIRCUIT, SAID TIME DELAY NETWORK HAVING A VALUE OF TIME DELAY TO CAUSE SAID SIGNAL OF GIVEN FREQUENCY AT SAID INPUT CIRCUIT TO BE IN THE SAME PHASE AS SAID SUPPRESSED CARRIER WITH RESPECT TO SAID DIFFERENCE COMBINATION OF STEREO SIGNALS, SAID STEREO DEMODULATOR CIRCUIT HAVING TWO OUTPUT CIRCUITS AND BEING ADAPTED TO DERIVE SAID STEREO SIGNALS FROM SAID COMPOSITE SIGNAL UNDER THE CONTROL OF SAID SIGNAL OF GIVEN FREQUENCY AND PROVIDE SAID DERIVED STEREO SIGNALS RESPECTIVELY AT SAID OUTPUT CIRCUITS, AND MEANS FOR APPLYING AT LEAST A PORTION OF THE SUM COMBINATION SIGNAL FROM THE COMPOSITE SIGNAL AT SAID RESISTANCE ELEMENT TO SAID FIRST AND SECOND OUTPUT CIRCUITS, RESPECTIVELY.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1970-10-09 | 1971-04-10 | 1971-10-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1974-10-09 | 1975-04-10 | 1975-10-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1978-10-09 | 1979-04-10 | 1979-10-10 | $7700.00 | Window Closed / Lapsed |