US3345553A
Expired / Lapsed
US
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Stabilized direct current supply circuit
Assignee: ELECTROFACT RADIUMWEG 30 AMERSFOORT NETHERLANDS A Co OF NETHERLANDS BV
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Filing: 1964-04-27
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Granted: 1967-10-03
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Expires: 1984-04-27
Abstract
No abstract record available.
Inventors
- 👤 Peter S Schermann
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 04:35
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/18
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
166 words
IN A STABILIZED DIRECT CURRENT CIRCUIT TO SUPPLY DIRECT CURRENT TO A LOAD, A PAIR OF INPUT TERMINALS (1, 2) ADAPTED FOR CONNECTION TO A SOURCE OF INPUT VOLTAGE (E1) SUBJECT TO VARIATION; A PAIR OF OUTPUT TERMINALS (6, 7) PROVIDING A REGULATED CURRENT (IO); AND A SOURCE OF DIRECT CURRENT (10) IN SERIES WITH SAID OUTPUT TERMINALS; A VOLTAGE DIVIDER (3, 4) COMPRISING AT LEAST ONE STABILIZING CIRCUIT ELEMENT (4) CONNECTED ACROSS SAID INPUT TERMINALS (1, 2); AND A TRANSISTOR (5) HAVING AN EMITTER RESISTANCE (8) CONNECTED TO THE EMITTER OF THE TRANSISTOR (5), THE COLLECTOR-EMITTER PATH BEING IN SERIES WITH SAID LOAD TERMINALS, AND THE BASE-EMITTER PATH BEING IN PARALLEL WITH ONE OF SAID ELEMENTS (4) OF THE VOLTAGE DIVIDER; THE IMPROVEMENT COMPRISING A FURTHER RESISTOR (9) INTERCONNECTING THE EMITTER AND THE OTHER SIDE OF THE OTHER OF SAID VOLTAGE DIVIDER ELEMENTS (3), THE FURTHER RESISTOR (9) AND SAID EMITTER RESISTANCE (8) FORMING A SECOND VOLTAGE DIVIDER CONNECTOR ACROSS SAID INPUT TERMINALS (1, 2).
Claim 2
Dependent Claim
166 words
IN A STABILIZED DIRECT CURRENT CIRCUIT TO SUPPLY DIRECT CURRENT TO A LOAD, A PAIR OF INPUT TERMINALS (1, 2) ADAPTED FOR CONNECTION TO A SOURCE OF INPUT VOLTAGE (E1) SUBJECT TO VARIATION; A PAIR OF OUTPUT TERMINALS (6, 7) PROVIDING A REGULATED CURRENT (IO); AND A SOURCE OF DIRECT CURRENT (10) IN SERIES WITH SAID OUTPUT TERMINALS; A VOLTAGE DIVIDER (3, 4) COMPRISING AT LEAST ONE STABILIZING CIRCUIT ELEMENT (4) CONNECTED ACROSS SAID INPUT TERMINALS (1, 2); AND A TRANSISTOR (5) HAVING AN EMITTER RESISTANCE (8) CONNECTED TO THE EMITTER OF THE TRANSISTOR (5), THE COLLECTOR-EMITTER PATH BEING IN SERIES WITH SAID LOAD TERMINALS, AND THE BASE-EMITTER PATH BEING IN PARALLEL WITH ONE OF SAID ELEMENTS (4) OF THE VOLTAGE DIVIDER; THE IMPROVEMENT COMPRISING A FURTHER RESISTOR (9) INTERCONNECTING THE EMITTER AND THE OTHER SIDE OF THE OTHER OF SAID VOLTAGE DIVIDER ELEMENTS (3), THE FURTHER RESISTOR (9) AND SAID EMITTER RESISTANCE (8) FORMING A SECOND VOLTAGE DIVIDER CONNECTOR ACROSS SAID INPUT TERMINALS (1, 2).
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1970-10-02 | 1971-04-03 | 1971-10-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1974-10-02 | 1975-04-03 | 1975-10-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1978-10-02 | 1979-04-03 | 1979-10-03 | $7700.00 | Window Closed / Lapsed |