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US3343091A Expired / Lapsed US ⏱️ 0.0 years remaining

Diphase transmission system with noise pulse cancellation

Assignee: Automatic Electric Laboratories Inc
•
Filing: 1964-06-05
•
Granted: 1967-09-19
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Expires: 1984-06-05
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Abstract

No abstract record available.

Inventors

  • 👤 Bruglemans Lucas

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 19:28
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/18; H04L27/20; H04L27/2032; H04L27/2035; H03; H03K; H03K9/00; H03K9/04; H04L27/22; H04L27/233

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 407 words
IN A SYSTEM FOR DEMODULATING A RECEIVED CARRIER SIGNAL WHICH IS PHASE SHIFT MODULATED BY DATA IN A BINARY SYSTEM OF NOTATION, IN WHICH EACH CYCLE AT THE CARRIER FREQUENCY REPRESENTS A BINARY DIGIT, A FIRST BINARY VALUE BEING REPRESENTED BY A PHASE REVERSEL AT THE BEGINNING OF A CYCLE, AND A SECOND BINARY VALUE BEING REPRESENTED BY THE SAME PHASE AS THE PRECEDING CYCLE; THE COMBINATION COMPRISING A LOW PASS FILTER HAVING A CUT OFF FREQUENCY SUBSTANTIALLY ABOVE THE CARRIER FREQUENCY FOR REMOVING THE COMPONENTS OF THE SIGNAL AT SAID PHASE REVERSAL POINTS WHICH FALL BETWEEN THE ZERO AMPLITUDE LEVEL AND A GIVEN THRESHOLD LEVEL; AN ARRANGEMENT INCLUDING SQUARING AND DIFFERENTIATING MEANS COUPLED TO THE OUTPUT OF THE FILTER TO DERIVE A PULSE FOR EACH OF THE ZERO CROSSINGS OF THE RECEIVED SIGNALS, WHEREBY FOR EACH BINARY DIGIT OF THE FIRST VALUE THERE IS ONE PULSE PRODUCED AND FOR EACH BINARY DIGIT OF THE SECOND VALUE THERE ARE TWO PULSES PRODUCED; FIRST INTEGRATING MEANS COUPLED TO SAID ARRANGEMENT FOR MEASURING THE TIME BETWEEN SAID PULSES TO PRODUCE A FIRST SIGNAL ONLY WHEN THE TIME BETWEEN SAID PULSES IS MORE THAN ONE-HALF CYCLE AT SAID CARRIER FREQUENCY, WHEREBY SAID FIRST SIGNAL IS PRODUCED IN RESPONSE TO EACH BINARY DIGIT OF THE FIRST VALUE; MEANS COUPLED TO THE OUTPUT OF SAID ARRANGEMENT AND THE OUTPUT OF SAID INTEGRATING MEANS TO DERIVE A SECOND SIGNAL DURING EACH CYCLE IN WHICH SAID FIRST SIGNAL IS NOT PRODUCED, WHEREBY THE SECOND SIGNAL REPRESENTS A RECEIVED BINARY DIGIT OF THE SECOND VALUE; GATING MEANS COUPLED TO THE OUTPUTS OF SAID ARRANGEMENT, SAID INTEGRATING MEANS, AND SAID MEANS FOR DERIVING A SECOND SIGNAL TO SELECT FROM THE OUTPUT OF SAID ARRANGEMENT ONE PULSE PER CYCLE, THEREBY PRODUCING A TIMING PULSE TRAIN HAVING ONE PULSE PER BINARY DIGIT; A REGISTER HAVING A TIMING CONTROL INPUT COUPLED TO THE OUTPUT OF SAID GATING MEANS, A FIRST SET INPUT COUPLED TO THE OUTPUT OF SAID INTEGRATING MENS, AND A SECOND SET COUPLED TO THE OUTPUT OF SAID MEANS FOR DERIVING A SECOND SIGNAL, WHEREBY DATA CORRESPONDING TO THE BINARY DATA IN SAID RECEIVED SIGNALS IS SERIALLY STORED IN THE REGISTER; SECOND INTEGRATING MEANS COUPLED TO SAID ARRANGEMENT FOR MEASURING THE TIME BETWEEN SAID PULSES TO PRODUCE A RESET SIGNAL ONLY WHEN THE TIME BETWEEN SAID PULSES IS MORE THAN ONE CYCLE AT SAID CARRIER FREQUENCY, AND MEANS RESPONSIVE TO SAID RESET SIGNAL TO RESET SAID REGISTER.
Claim 2
Dependent Claim 407 words
IN A SYSTEM FOR DEMODULATING A RECEIVED CARRIER SIGNAL WHICH IS PHASE SHIFT MODULATED BY DATA IN A BINARY SYSTEM OF NOTATION, IN WHICH EACH CYCLE AT THE CARRIER FREQUENCY REPRESENTS A BINARY DIGIT, A FIRST BINARY VALUE BEING REPRESENTED BY A PHASE REVERSEL AT THE BEGINNING OF A CYCLE, AND A SECOND BINARY VALUE BEING REPRESENTED BY THE SAME PHASE AS THE PRECEDING CYCLE; THE COMBINATION COMPRISING A LOW PASS FILTER HAVING A CUT OFF FREQUENCY SUBSTANTIALLY ABOVE THE CARRIER FREQUENCY FOR REMOVING THE COMPONENTS OF THE SIGNAL AT SAID PHASE REVERSAL POINTS WHICH FALL BETWEEN THE ZERO AMPLITUDE LEVEL AND A GIVEN THRESHOLD LEVEL; AN ARRANGEMENT INCLUDING SQUARING AND DIFFERENTIATING MEANS COUPLED TO THE OUTPUT OF THE FILTER TO DERIVE A PULSE FOR EACH OF THE ZERO CROSSINGS OF THE RECEIVED SIGNALS, WHEREBY FOR EACH BINARY DIGIT OF THE FIRST VALUE THERE IS ONE PULSE PRODUCED AND FOR EACH BINARY DIGIT OF THE SECOND VALUE THERE ARE TWO PULSES PRODUCED; FIRST INTEGRATING MEANS COUPLED TO SAID ARRANGEMENT FOR MEASURING THE TIME BETWEEN SAID PULSES TO PRODUCE A FIRST SIGNAL ONLY WHEN THE TIME BETWEEN SAID PULSES IS MORE THAN ONE-HALF CYCLE AT SAID CARRIER FREQUENCY, WHEREBY SAID FIRST SIGNAL IS PRODUCED IN RESPONSE TO EACH BINARY DIGIT OF THE FIRST VALUE; MEANS COUPLED TO THE OUTPUT OF SAID ARRANGEMENT AND THE OUTPUT OF SAID INTEGRATING MEANS TO DERIVE A SECOND SIGNAL DURING EACH CYCLE IN WHICH SAID FIRST SIGNAL IS NOT PRODUCED, WHEREBY THE SECOND SIGNAL REPRESENTS A RECEIVED BINARY DIGIT OF THE SECOND VALUE; GATING MEANS COUPLED TO THE OUTPUTS OF SAID ARRANGEMENT, SAID INTEGRATING MEANS, AND SAID MEANS FOR DERIVING A SECOND SIGNAL TO SELECT FROM THE OUTPUT OF SAID ARRANGEMENT ONE PULSE PER CYCLE, THEREBY PRODUCING A TIMING PULSE TRAIN HAVING ONE PULSE PER BINARY DIGIT; A REGISTER HAVING A TIMING CONTROL INPUT COUPLED TO THE OUTPUT OF SAID GATING MEANS, A FIRST SET INPUT COUPLED TO THE OUTPUT OF SAID INTEGRATING MENS, AND A SECOND SET COUPLED TO THE OUTPUT OF SAID MEANS FOR DERIVING A SECOND SIGNAL, WHEREBY DATA CORRESPONDING TO THE BINARY DATA IN SAID RECEIVED SIGNALS IS SERIALLY STORED IN THE REGISTER; SECOND INTEGRATING MEANS COUPLED TO SAID ARRANGEMENT FOR MEASURING THE TIME BETWEEN SAID PULSES TO PRODUCE A RESET SIGNAL ONLY WHEN THE TIME BETWEEN SAID PULSES IS MORE THAN ONE CYCLE AT SAID CARRIER FREQUENCY, AND MEANS RESPONSIVE TO SAID RESET SIGNAL TO RESET SAID REGISTER.

References Cited (Backward Citations)

US3032745A Cited
US3215779A Cited
US3156893A Cited
US3159793A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1970-09-18 1971-03-20 1971-09-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1974-09-18 1975-03-20 1975-09-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1978-09-18 1979-03-20 1979-09-19 $7700.00 Window Closed / Lapsed

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