← Back to Patent Explorer
US3340423A Expired / Lapsed US ⏱️ 0.0 years remaining

Single stage vertical sweep circuit

Assignee: Motorola Solutions Inc
•
Filing: 1964-04-02
•
Granted: 1967-09-05
•
Expires: 1984-04-02
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

No abstract record available.

Inventors

  • 👤 George D Doland

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 18:38
CPC Classifications
H; H03; H03K; H03K4/00; H03K4/06; H03K4/08; H03K4/10; H03K4/26; H03K4/39; H03K4/43

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 149 words
A SIGNAL GENERATING CIRCUIT TO PRODUCED BEAM DEFLECTION WAVES FOR A CATHODE RAY TUBE, WHICH WAVES HAVE A TRACE PORTION AND A RETRACE PORTION, INCLUDING IN COMBINATION; AN ELECTRON CONTROL DEVICE HAVING CONTROL AND OUTPUT ELECTRODES, AN OUTPUT LOAD COUPLED TO SAID OUTPUT ELECTORDE, SAID LOAD INCLUDING INDUCTOR MEANS TO RELEASE STORED ENERGY DURING THE RETRACE PORTION OF THE DEFLECTION WAVES, A FEEDBACK NETWORK INCLUDING A FIRST DIODE AND FIRST CAPACITOR MEANS SEREIS COUPLED BETWEEN SAID OUTPUT LOAD AND SAID CONTROL ELECTRODE, NETWORK MEANS COUPLED TO SAID CONTROL GRID ELECTRODE AND INCLUDING SECOND CAPACITOR MEANS TO BE CHARGED TO ESTABLISH A CONTROLLING WAVEFORM AT SAID CONTROL ELECTROD, A SECOND DIODE COUPLED IN SHUNT WITH SAID SECOND CAPACITOR MEANS, FIRST CIRCUIT MEANS FOR CHARGING SAID SECOND CAPACITOR MEANS DURING THE TRACE PORTION OF THE DEFLECTION WAVES, AND SECOND CIRCUIT MEANS FOR PROVIDING A DISCHARGE PATH FOR SAID SECOND CAPACITOR MEANS,
Claim 2
Dependent Claim 149 words
A SIGNAL GENERATING CIRCUIT TO PRODUCED BEAM DEFLECTION WAVES FOR A CATHODE RAY TUBE, WHICH WAVES HAVE A TRACE PORTION AND A RETRACE PORTION, INCLUDING IN COMBINATION; AN ELECTRON CONTROL DEVICE HAVING CONTROL AND OUTPUT ELECTRODES, AN OUTPUT LOAD COUPLED TO SAID OUTPUT ELECTORDE, SAID LOAD INCLUDING INDUCTOR MEANS TO RELEASE STORED ENERGY DURING THE RETRACE PORTION OF THE DEFLECTION WAVES, A FEEDBACK NETWORK INCLUDING A FIRST DIODE AND FIRST CAPACITOR MEANS SEREIS COUPLED BETWEEN SAID OUTPUT LOAD AND SAID CONTROL ELECTRODE, NETWORK MEANS COUPLED TO SAID CONTROL GRID ELECTRODE AND INCLUDING SECOND CAPACITOR MEANS TO BE CHARGED TO ESTABLISH A CONTROLLING WAVEFORM AT SAID CONTROL ELECTROD, A SECOND DIODE COUPLED IN SHUNT WITH SAID SECOND CAPACITOR MEANS, FIRST CIRCUIT MEANS FOR CHARGING SAID SECOND CAPACITOR MEANS DURING THE TRACE PORTION OF THE DEFLECTION WAVES, AND SECOND CIRCUIT MEANS FOR PROVIDING A DISCHARGE PATH FOR SAID SECOND CAPACITOR MEANS,

References Cited (Backward Citations)

US2926284A Cited
US3206634A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1970-09-04 1971-03-06 1971-09-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1974-09-04 1975-03-06 1975-09-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1978-09-04 1979-03-06 1979-09-05 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag