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US3337862A Expired / Lapsed US ⏱️ 0.0 years remaining

Electrical signalling systems

Assignee: British Telecommunications PLC
•
Filing: 1963-11-12
•
Granted: 1967-08-22
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Expires: 1983-11-12
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Abstract

No abstract record available.

Inventors

  • 👤 Croft Geoffrey Francis
  • 👤 Davis John Christopher Hammond

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 04:52
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/156; H03K5/01; H04; H04L; H04L25/00; H04L25/38; H04L25/40; H04L25/49; H04L25/4917; H04L25/4923; H04L25/4925

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 164 words
EQUIPMENT FOR CONVERTING A SIGNALLING WAVEFORM INVOLVING CHANGES FROM ONE TO THE OTHER OF TWO CURRENT LEVELS INTO DISCRETE PULSES OF ALTERNATE POLARITY CORRESPONDING TO SUCH CHANGES, COMPRISING IN COMBINATION A FIRST TRANSISTOR OF ONE CONDUCTIVITY TYPE, A SECOND TRANSISTOR OF OPPOSITE CONDUCTIVITY TYPE, EACH OF SAID TRANSISTORS HAVING BASE, EMITTER AND COLLECTOR ELECTRODES, A FIRST CONSTANT CURRENT SOURCE CONNECTED TO THE EMMITER OF SAID FIRST TRANSISTOR, A SECOND CONSTANT CURRENT SOURCE CONNECTED TO THE EMITTER OF SAID SECOND TRANSISTOR, AN OUTPUT TERMINAL, A CAPACITOR HAVING ONE PLATE CONNECTED TO THE COLLECTORS OF BOTH SAID TRANSISTORS AND THE OTHER PLATE TO SAID OUTPUT TERMINAL, MEANS FOR SUPPLYING SAID SIGNALLING WAVEFORM TO THE BASE OF SAID FIRST TRANSISTOR, A VOLTAGE TRANSLATOR HAVING AN INPUT AND AN OUTPUT, MEANS FOR SUPPLYING SAID SIGNALLING WAVEFORM TO THE INPUT OF SAID VOLTAGE TRANSLATOR, A CONNECTION FROM THE OUTPUT OF SAID VOLTAGE TRANSLATOR TO THE BASE OF SAID SECOND TRANSISTOR AND A LOAD CIRCUIT CONNECTED TO SAID OUTPUT TERMINAL.
Claim 2
Dependent Claim 164 words
EQUIPMENT FOR CONVERTING A SIGNALLING WAVEFORM INVOLVING CHANGES FROM ONE TO THE OTHER OF TWO CURRENT LEVELS INTO DISCRETE PULSES OF ALTERNATE POLARITY CORRESPONDING TO SUCH CHANGES, COMPRISING IN COMBINATION A FIRST TRANSISTOR OF ONE CONDUCTIVITY TYPE, A SECOND TRANSISTOR OF OPPOSITE CONDUCTIVITY TYPE, EACH OF SAID TRANSISTORS HAVING BASE, EMITTER AND COLLECTOR ELECTRODES, A FIRST CONSTANT CURRENT SOURCE CONNECTED TO THE EMMITER OF SAID FIRST TRANSISTOR, A SECOND CONSTANT CURRENT SOURCE CONNECTED TO THE EMITTER OF SAID SECOND TRANSISTOR, AN OUTPUT TERMINAL, A CAPACITOR HAVING ONE PLATE CONNECTED TO THE COLLECTORS OF BOTH SAID TRANSISTORS AND THE OTHER PLATE TO SAID OUTPUT TERMINAL, MEANS FOR SUPPLYING SAID SIGNALLING WAVEFORM TO THE BASE OF SAID FIRST TRANSISTOR, A VOLTAGE TRANSLATOR HAVING AN INPUT AND AN OUTPUT, MEANS FOR SUPPLYING SAID SIGNALLING WAVEFORM TO THE INPUT OF SAID VOLTAGE TRANSLATOR, A CONNECTION FROM THE OUTPUT OF SAID VOLTAGE TRANSLATOR TO THE BASE OF SAID SECOND TRANSISTOR AND A LOAD CIRCUIT CONNECTED TO SAID OUTPUT TERMINAL.

References Cited (Backward Citations)

US3217316A Cited
US3200263A Cited
US3154777A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1970-08-21 1971-02-20 1971-08-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1974-08-21 1975-02-20 1975-08-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1978-08-21 1979-02-20 1979-08-22 $7700.00 Window Closed / Lapsed

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