Combined transistor and testing structures and fabrication thereof

Claim 1

A COMBINED TRANSISTOR AND TESTING STRUCTURE COMPRISING: A SEMICONDUCTOR BODY OF ONE CONDUCTIVITY TYPE; FIRST AND SECOND DIFFUSED MEMBERS OF THE OPPOSITE CONDUCTIVITY TYPE DISPOSED IN SPACED PORTIONS OF SAID BODY, SAID FIRST AND SECOND MEMBERS HAVING THE SAME IMPURITY LEVEL, AND SAID SECOND MEMBER INCLUDING A PAIR OF ENLARGED PORTIONS SEPARATED BY AN INTERMEDIATE PORTION; A DIFFUSED EMITTER REGION OF SAID ONE CONDUCTIVITY TYPE FOR SAID TRANSISTOR DISPOSED IN A PORTION OF SAID FIRST MEMBER, ESTABLISHING THE REMAINDER THEREOF AS THE BASE REGION OF SAID TRANSISTOR BETWEEN SAID EMITTER REGION AND SAID BODY WHEREIN THE LATTER CONSTITUTES THE COLLECTOR REGION OF SAID TRANSISTOR, AND FURTHER ESTABLISHING THE EFFECTIVE WIDTH OF SAID BASE REGION; A DIFFUSED THIRD MEMBER OF SAID ONE CONDUCTIVITY TYPE HAVING THE SAME IMPURITY CONCENTRATION PROFILE AS SAID EMITTER REGION AND DISPOSED IN AND EXTENDING COMPLETELY ACROSS SAID INTERMEDIATE PORTION OF SAID SECOND MEMBER AND ESTABLISHING THE EFFECTIVE WIDTH OF SAID INTERMEDIATE PORTION BETWEEN SAID THIRD MEMBER AND SAID BODY WHICH IS EQUAL TO SAID WIDTH OF SAID BASE REGION; AND FURTHER ESTABLISHING AND EFFECTIVE LENGTH FOR SAID INTERMEDIATE PORTION WHICH IS IN THE RANGE OF 1-20 TIMES ITS OTHER DIMENSION NORMAL TO SAID LENGTH; SAID SECOND AND THIRD MEMBERS FORMING SAID TESTING STRUCTURE FOR USE IN MEASURING THE EFFECTIVE BASE WIDTH OF SAID TRANSISTOR.