Electronic control system for driving and clearing an integrating network

Claim 1

AN ELECTRONIC ALTERNATING DRIVE AND CLEARING CIRCUIT FOR A NETWORK CONTROLLING A SOLID STATE DISPLAY COMPRISING, AN ALTERNATING CURRENT INPUT SIGNAL MEANS OPERABLE FOR SENSING A MEASURED PARAMETER ACTING IN AN INCREASING AND DECREASING SENSE, A SPLIT PHASE INVERTER TRANSISTOR HAVING A BASE ELEMENT OPERABLY CONNECTED TO SAID ALTERNATING CURRENT INPUT SIGNAL MEANS TO BE CONTROLLED THEREBY, SAID SPILT PHASE INVERTER TRANSISTOR OPERABLE TO DIRECT AN OUTPUT PULSE OF A PREDETERMINED PHASE WHEN SAID ALTERNATING CURRENT INPUT SIGNAL MEANS SENSES AN INCREASING MEASURED PARAMETER AND OPERABLE TO DIRECT ANOTHER PULSE AT A PHASE OPPOSITE TO SAID PREDETERMINED PHASE WHEN SAID ALTERNATING CURRENT INPUT SIGNAL MEANS SENSES A DECREASING MEASURED PARAMETER, A DIRECT CURRENT SUPPLY SOURCE CONNECTED TO A COLLECTOR ELEMENT OF SAID SPILT PHASE INVERTER TRANSISTOR, SAID TRANSISTOR HAVING AN EMITTER ELEMENT CONNECTED TO GROUND, AN ALTERNATING CURRENT REFERENCE VOLTAGE SOURCE, A RECTIFYING DIODE CONNECTED TO SAID ALTERNATING CURRENT REFERENCE VOLTAGE SOURCE OPERABLE TO DIRECT A POSITIVE VOLTAGE THERETHROUGH, A FIRST SILICON CONTROLLED RECTIFIER OPERABLY CONNECTED TO SAID RECTIFYING DIODE AND HAVING A GATING ELECTRODE CONNECTED TO THE COLLECTOR ELEMENT OF SAID TRANSISTOR FOR RECEIVING AT THE GATING ELECTRODE THEREOF A SIGNAL FROM SAID INPUT SIGNAL MEANS OF THE PREDETERMINED PHASE TO OPERATE SAID FIRST SILICON CONTROLLED RECTIFIER SO AS TO PERMIT ALTERNATING CURRENT VOLTAGE FROM SAID ALTERNATING CURRENT REFERENCE VOLTAGE SOURCE TO BE CONDUCTED THERETHROUGH TO DRIVE THE DRIVEN CIRCUIT FOR PRESENTING AN BLE TO DIRECT SAID ALTERNATING CURRENT VOLTAGE, SAID SWITCHBLE TO DIRECT SAID ALTERNATING CURRENT VOLTAGE, SAID SWITCHING MEANS HAVING A FIRST SWITCHING TRANSISTOR OPERABLE TO RECEIVE THE ALTERNATING CURRENT VOLTAGE AND TO PERMIT THE VOLTAGE FROM SAID FIRST SILICON CONTROLLED RECTIFIER TO BE DIRECTED THERETHROUGH TO THE DRIVEN CIRCUIT, A SECOND SWITCHING TRANSISTOR OPERABLE TO RECEIVE THE ALTERNATING CURRENT VOLTAGE OF A PHASE OPPOSITE FROM THAT DIRECTED TO THE FIRST SWITCHING TRANSISTOR FOR PERMITTING THE ALTERNATING CURRENT VOLTAGE TO BE DIRECTED THERETHROUGH TO THE DRIVEN CIRCUIT, THE DRIVEN CIRCUIT BEING OPERABLE BY THE ALTERNATING CURRENT VOLTAGE DIRECTED THERETHROUGH TO THE AND SECOND SWITCHING TRANSISTORS SO AS TO BE ALTERNATELY DRIVEN FOR PROVIDING AN INCREASING DISPLAY SIGNAL, A SECOND SILICON CONTROLLED RECTIFIER OPERABLY CONNECTED TO SAID RECTIFYING DIODE AND HAVING A GATING ELECTRODE CONNECTED TO THE EMITTER ELEMENT OF SAID SPLIT PHASE INVERTER TRANSISTOR AND OPERABLE TO CONDUCT ALTERNATING CURRENT VOLTAGE THERETHROUGH FROM SAID ALTERNATING CURRENT REFERENCE VOLTAGE SOURCE UPON RECEIVING AT THE GATING ELECTRODE THEREOF AN INPUT SIGNAL OF A PHASE OPPOSITE TO SAID PREDETERMINED PHASE FOR PRESENTING A DECREASING MEASURED PARAMETER, A CLEARING CIRCUIT RECEIVING THE ALTERNATING CURRENT VOLTAGE CONDUCTED THROUGH SAID SECOND SILICON CONTROLLED RECTIFIER UPON A DECREASING INPUT SIGNAL FROM SAID ALTERNATING CURRENT INPUT SIGNAL SOURCE, SAID CLEARING CIRCUIT FURTHER COMPRISING A FIRST CLEARING TRANSISTOR HAVING A BASE ELEMENT DIRECTLY CONNECTED TO THE OUTPUT FROM SAID SECOND SILICON CONTROLLED RECTIFIER, SAID FIRST TRANSISTOR HAVING COLLECTOR AND EMITTER ELEMENTS CONNECTED TO FIRST OUTPUT CONDUCTORS OF A FIRST PORTION OF SAID DRIVEN CIRCUIT, THE BASE ELEMENT BEING RESPONSIVE TO THE SECOND RECTIFIER OUTPUT TO RENDER THE FIRST TRANSISTOR CONDUCTIVE TO PERMIT CLEARING OF SAID DRIVEN CIRCUIT UPON A SINGLE OUTPUT PULSE BEING RECEIVED BY THE BASE ELEMENT OF THE FIRST CLEARING TRANSISTOR FROM SAID SECOND SILICON CONTROLLED RECTIFIER FOR CLEARING VOLTAGE FROM THE FIRST PORTION OF THE DRIVEN CIRCUIT THROUGH SAID FIRST OUTPUT CONDUCTORS, AND A SECOND CLEARING TRANSISTOR OPERABLE BY A DELAYED CIRCUIT HAVING A RESISTOR, AND A CAPACITOR OPERABLY CONNECTING A BASE OF SAID SECOND TRANSISTOR TO THE OUTPUT FROM SAID SECOND SILICON CONTROLLED RECTIFIER, SAID CAPACITOR OPERABLE FOR BUILDING UP A CONTROL VOLTAGE UPON A PLURALTY OF OUTPUT PULSES BEING RECEIVED FROM THE OUTPUT OF SAID SECOND SILICON CONTROLLED RECTIFIER, AND SAID SECOND CLEARING TRANSISTOR HAVING COLLECTOR AND EMITTER ELEMENTS CONNECTED TO SECOND OUTPUT CONDUCTORS OF A SECOND PORTION OF SAID DRIVEN CIRCUIT, SAID BASE ELEMENT BEING RESPONSIVE TO THE OUTPUT FROM THE SECOND RECTIFIER FOR CLEARING SAID DRIVEN CIRCUIT UPON A BUILD-UP OF SAID OUTPUT VOLTAGE PULSES WITHIN THE DELAY CIRCUIT TO A PREDETERMINED VALUE TO CLEAR VOLTAGE FROM THE SECOND PORTION OF THE DRIVEN CIRCUIT THROUGH SAID SECOND OUTPUT CONDUCTORS.