Analyzer using digital integration techniques

Claim 1

APPARATUS COMPRISING A SIGNAL SOURCE ADAPTED TO PROVIDED A PLURALITY OF OUTPUT VOLTAGES IN SEQUENCE; INTEGRANTING MEANS; MEANS FOR APPLYING SAID OUTPUT VOLTAGES FROM SAID SIGNAL SOURCE TO AN INPUT OF SAID INTEGRATING MEANS IN SEQUENCE; TRANSFER GATING MEANS FOR APPLYING THE OUTPUT OF SAID INTEGRATING MEANS TO AN INPUT OF SAID TRANSFER GATING MEANS; MEANS FOR RECEIVING THE OUTPUT OF SAID INTEGRATING MEANS; MEANS FOR APPLYING THE OUTPUT OF SAID TRANSFER GATING MEANS TO AN INPUT OF SAID MEANS FOR RECEIVING; DIFFERENTIATING MEANS; MEANS TO APPLY SAID OUTPUT VOLTAGES FROM SAID SIGNAL SOURCE TO AN INPUT OF SAID DIFFERENTIATING MEANS; MEANS RESPONSIVE TO THE OUTPUT OF SAID DIFFERENTIATING MEANS FOR PRODUCING A FIRST OUTPUT SIGNAL ONLY WHEN THE OUTPUT OF SAID DIFFERENTIATING MEANS IS NON-POSITIVE, MEANS RESPONSIVE TO THE OUTPUT OF SAID DIFFERENTIATING MEANS FOR PRODUCING A SECOND OUTPUT SIGNAL ONLY WHEN THE OUTPUT OF SAID DIFFERENTIATING MEANS IS NEGATIVE; TIMING MEANS FOR PRODUCING FIRST AND SECOND TIMING SIGNALS; MEANS RESPONSIVE TO THE SIMULTANEOUS OCCURRENCE OF A FIRST OUTPUT SIGNAL AND A FIRST TIMING SIGNAL TO ACTUATE SAID INTEGRATING MEANS AT THE TERMINATION OF THE RESPECTIVE FIRST OUTPUT SIGNAL; AND MEANS RESPONSIVE TO THE SIMULTANEOUS OCCURRENCE OF A SECOND OUTPUT SIGNAL AND A SECOND TIMING SIGNAL TO ACTUATE SAID TRANSFER GATING MEANS TO TRANSMIT THE OUTPUT OF SAID INTEGRATING MEANS TO SAID MEANS FOR RECEIVING AT THE TERMINATION OF THE RESPECTIVE SECOND OUTPUT SIGNAL.