US3327201A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Series voltage regulator with protection circuit
Assignee: Individual
•
Filing: 1963-12-11
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Granted: 1967-06-20
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Expires: 1983-12-11
Abstract
No abstract record available.
Inventors
- 👤 Jr Lott W Brantley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 22:32
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/56; G05F1/565; G05F1/569; G05F1/573; G05F1/5735
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
218 words
A VOLTAGE REGULATOR COMPRISING: AN UNREGULATED VOLTAGE SOURCE HAVING FIRST AND SECOND OUTPUT TERMINALS; A FIRST TRANSISTOR HAVING BASE, EMITTER, AND COLLECTOR ELECTRODES, AND COLLECTOR BEING CONNECTED TO SAID FIRST TERMINAL OF SAID SOURCE; A LOAD CONNECTED IN SERIES WITH THE SECOND TERMINAL OF SAID SOURCE AND THE EMITTER ELECTRODE OF SAID FIRST TRANSISTOR; MEANS CONNECTED ACROSS SAID LOAD AND TO THE BASE OF SAID FIRST TRANSISTOR FOR CONTROLLING SAID FIRST TRANSISTOR IN RESPONSE TO THE VOLTAGE LEVEL ACROSS SAID LOAD; A PROTECTION CIRCUIT FOR PROTECTING SAID TRANSISTOR AGAINST DAMAGE FROM OVER LOAD AND SHORT CIRCUIT CURRENTS, SAID PROTECTION CIRCUIT INCLUDING A SECOND TRANSISTOR HAVING BASE, EMITTER AND COLLECTOR ELECTRODES, THE EMITTER AND COLLECTOR ELECTRODES BEING CONNECTED BETWEEN THE BASE OF SAID FIRST TRANSISTOR AND THE SECOND TERMINAL OF SAID SOURCE, AND A TUNNEL DIODE CONNECTED BETWEEN THE BASE OF SAID SECOND TRANSISTOR AND THE SECOND TERMINAL OF SAID SOURCE, MEANS FOR SUPPLYING A TRICKLE CURRENT TO THE BASE OF SAID SECOND TRANSISTOR; AND A LOAD CURRENT SAMPLING MEANS COMPRISING A FIRST RESISTOR CONNECTED IN SERIES WITH SAID LOAD AND THE SECOND TERMINAL OF SAID SOURCE, AND A SECOND RESISTOR AND A CAPACITOR CONNECTED IN SERIES WITH EACH OTHER AND IN PARALLEL WITH SAID FIRST RESISTOR, AND WHEREIN SAID CAPACITOR IS CONNECTED IN PARALLEL WITH SAID TUNNEL DIODE.
Claim 2
Dependent Claim
218 words
A VOLTAGE REGULATOR COMPRISING: AN UNREGULATED VOLTAGE SOURCE HAVING FIRST AND SECOND OUTPUT TERMINALS; A FIRST TRANSISTOR HAVING BASE, EMITTER, AND COLLECTOR ELECTRODES, AND COLLECTOR BEING CONNECTED TO SAID FIRST TERMINAL OF SAID SOURCE; A LOAD CONNECTED IN SERIES WITH THE SECOND TERMINAL OF SAID SOURCE AND THE EMITTER ELECTRODE OF SAID FIRST TRANSISTOR; MEANS CONNECTED ACROSS SAID LOAD AND TO THE BASE OF SAID FIRST TRANSISTOR FOR CONTROLLING SAID FIRST TRANSISTOR IN RESPONSE TO THE VOLTAGE LEVEL ACROSS SAID LOAD; A PROTECTION CIRCUIT FOR PROTECTING SAID TRANSISTOR AGAINST DAMAGE FROM OVER LOAD AND SHORT CIRCUIT CURRENTS, SAID PROTECTION CIRCUIT INCLUDING A SECOND TRANSISTOR HAVING BASE, EMITTER AND COLLECTOR ELECTRODES, THE EMITTER AND COLLECTOR ELECTRODES BEING CONNECTED BETWEEN THE BASE OF SAID FIRST TRANSISTOR AND THE SECOND TERMINAL OF SAID SOURCE, AND A TUNNEL DIODE CONNECTED BETWEEN THE BASE OF SAID SECOND TRANSISTOR AND THE SECOND TERMINAL OF SAID SOURCE, MEANS FOR SUPPLYING A TRICKLE CURRENT TO THE BASE OF SAID SECOND TRANSISTOR; AND A LOAD CURRENT SAMPLING MEANS COMPRISING A FIRST RESISTOR CONNECTED IN SERIES WITH SAID LOAD AND THE SECOND TERMINAL OF SAID SOURCE, AND A SECOND RESISTOR AND A CAPACITOR CONNECTED IN SERIES WITH EACH OTHER AND IN PARALLEL WITH SAID FIRST RESISTOR, AND WHEREIN SAID CAPACITOR IS CONNECTED IN PARALLEL WITH SAID TUNNEL DIODE.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1970-06-19 | 1970-12-19 | 1971-06-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1974-06-19 | 1974-12-19 | 1975-06-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1978-06-19 | 1978-12-19 | 1979-06-20 | $7700.00 | Window Closed / Lapsed |