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US3322972A Expired / Lapsed US ⏱️ 0.0 years remaining

High current negative resistance transistor circuits utilizing avalanche diodes

Assignee: Motorola Solutions Inc
•
Filing: 1964-10-08
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Granted: 1967-05-30
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Expires: 1984-10-08
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Abstract

No abstract record available.

Inventors

  • 👤 Csanky Geza

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 11:26
CPC Classifications
H; H03; H03B; H03B7/00; H03B7/02; H03B7/06; G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/18; G05F3/185

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 111 words
A NAGATIVE RESISTANCE CIRCUIT INCLUDING IN COMBINATION, A FIRST TRANSISTOR HAVING INPUT, OUTPUT AND CONTROL ELECTRODES, INPUT TERMINAL MEANS, MEANS FOR CONNECTING THE INPUT AND OUTPUT ELECTRODES OF SAID FIRST TRANSISTOR IN SERIES BETWEEN A LOAD AND SAID INPUT TERMINAL MEANS, A SECOND TRANSISTOR HAVING INPUT, OUTPUT AND CONTROL ELECTRODES, MEANS CONNECTING THE OUTPUT ELECTRODE OF SAID SECOND TRANSISTOR TO THE CONTROL ELECTRODE OF SAID FIRST TRANSISTOR, A FIRST AVALANCHE DIODE AND A FIRST RESISTANCE MEANS CONNECTED IN SERIES BETWEEN SAID INPUT TERMINALS MEANS AND A REFERENCE POINT, WITH THE JUNCTION OF SAID FIRST AVALANCHE DIODE AND SAID FIRST RESISTANCE MEANS CONNECTED TO THE CONTROL ELECTRODE OF SAID SECOND TRANSISTOR, SECOND
Claim 2
Dependent Claim 111 words
A NAGATIVE RESISTANCE CIRCUIT INCLUDING IN COMBINATION, A FIRST TRANSISTOR HAVING INPUT, OUTPUT AND CONTROL ELECTRODES, INPUT TERMINAL MEANS, MEANS FOR CONNECTING THE INPUT AND OUTPUT ELECTRODES OF SAID FIRST TRANSISTOR IN SERIES BETWEEN A LOAD AND SAID INPUT TERMINAL MEANS, A SECOND TRANSISTOR HAVING INPUT, OUTPUT AND CONTROL ELECTRODES, MEANS CONNECTING THE OUTPUT ELECTRODE OF SAID SECOND TRANSISTOR TO THE CONTROL ELECTRODE OF SAID FIRST TRANSISTOR, A FIRST AVALANCHE DIODE AND A FIRST RESISTANCE MEANS CONNECTED IN SERIES BETWEEN SAID INPUT TERMINALS MEANS AND A REFERENCE POINT, WITH THE JUNCTION OF SAID FIRST AVALANCHE DIODE AND SAID FIRST RESISTANCE MEANS CONNECTED TO THE CONTROL ELECTRODE OF SAID SECOND TRANSISTOR, SECOND

References Cited (Backward Citations)

US3047667A Cited
US3223849A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1970-05-29 1970-11-28 1971-05-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1974-05-29 1974-11-28 1975-05-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1978-05-29 1978-11-28 1979-05-30 $7700.00 Window Closed / Lapsed

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