Plural memory system with internal memory transfer and duplicated information

Claim 1

IN COMBINATION, A CENTRAL DATA PROCESSOR COMPRISING A CENTRAL CONTROL, A MEMORY ARRANGEMENT AND TRANSMISSION MEANS INTERCONNECTING SAID CENTRAL CONTROL AND SAID MEMORY ARRANGEMENT, SAID CENTRAL CONTROL COMPRISING MEANS FOR GENERATING COMMANDS FOR CONTROLLING SAID MEMORY ARRANGEMENT, CERTAIN OF SAID COMMANDS BEING MEMORY COMMANDS AND OTHER OF SAID COMMANDS BEING CONTROL COMMANDS, SAID MEMORY ARRANGEMENT COMPRISING A PLURALITY OF INDEPENDENT MEMORY UNITS, EACH OF SAID MEMORY UNITS COMPRISING A MEMORY PROPER AND CONTROL MEANS INCLUDING A PLURALITY OF CONTROL LOCATIONS, SAID CONTROL MEANS RESPONSIVE TO SAID MEMORY COMMANDS TO CONTROL SAID MEMORY PROPER AND RESPONSIVE TO SAID CONTROL COMMANDS FOR PROVIDING ACCESS TO SAID CONTROL LOCATIONS, SAID TRANSMISSION MEANS COMPRISING A COMMAND TRANSMISSION BUS SYSTEM FOR TRANSMITTING SAID COMMANDS FROM SAID CENTRAL CONTROL TO SAID MEMORY ARRANGEMENT AND A RESPONSE BUS SYSTEM FOR TRANSMITTING RESPONSES FROM SAID MEMORY ARRANGEMENT TO SAID CENTRAL CONTROL, SAID COMMAND TRANSMISSION BUS SYSTEM COMPRISES A "O" COMMAND BUS AND A "1" COMMAND BUS, SAID RESPONSE BUS SYSTEM COMPRISES A "0" RESPONSE BUS AND A "1" RESPONSE BUS, SAID MEMORY PROPER COMPRISES A LEFT HALF A RIGHT HALF, SAID CONTROL MEANS COMPRISES A PLURALITY OF RESPONSE CONTROL FLIP-FLOPS, AND SAID CONTROL MEANS IS RESPONSIVE TO SAID MEMORY COMMANDS TO SELECTIVELY READ INFORMATION FROM SAID LEFT HALF OR SAID RIGHT HALF OF SAID MEMORY PROPER AND RESPONSIVE TO THE STATES OF SAID RESPONSE CONTROL FLIPFLOPS AND A PORTION OF SAID MEMORY COMMAND TO SELECTIVELY TRANSMIT INFORMATION READ FROM SAID MEMORY PROPER TO SAID "0" RESPONSE BUS AND TO SAID "1" RESPONSE BUS.