Circuit arrangement for effecting the forward and reverse control of a two-stage transistor amplifier

Claim 1

A CIRCUIT ARRANGEMENT FOR AFFECTING THE FORWARD AND REVERSE CONTROL OF A TWO-STAGE TRANSISTOR AMPLIFIER COMPRISING: A SOURCE OF D.C. POTENTIAL; A FIRST FORWARD CONTROLLED TRANSISTOR HAVING A BASE, EMITTER, AND COLLECTOR; A SECOND REVERSE CONTROLLED TRANSISTOR HAVING A BASE, EMITTER, AND COLLECTOR; MEANS CONNECTING SAID FIRST AND SECOND TRANSISTOR COLLECTORS TO SAID SOURCE OF D.C. POTENTIAL; MEANS COUPLING THE COLLECTOR OF SAID FIRST TRANSISTOR TO THE BASE OF SAID SECOND TRANSISTOR; A FIRST EMITTER RESISTOR CONNECTED BETWEEN SAID FIRST TRANSISTOR EMITTER AND A JUNCTION POINT; A SECOND EMITTER RESISTOR CONNECTED BETWEEN SAID SECOND TRANSISTOR EMITTER AND SAID JUNCTION POINT; A COMMON EMITTER RESISTOR CONNECTED BETWEEN SAID JUNCTION POINT AND GROUND; A SOURCE OF CONTROL VOLTAGE RESISTIVELY COUPLED TO THE BASE OF SAID SECOND TRANSISTOR; A SOURCE OF SIGNAL VOLTAGE CAPACITIVELY COUPLED TO THE BASE OF SAID FIRST TRANSISTOR; AND ADDITIONAL RESISTANCE MEANS COUPLED TO THE BASE OF SAID FIRST TRANSISTOR WHICH IN COOPERATION WITH SAID COMMON EMITTER RESISTOR ADJUSTS THE NO SIGNAL BASE CURRENT OF SAID FIRST AND SECOND TRANSISTORS TO RELATIVELY HIGH VALUES, WHEREBY THE OPERATING POINT OF SAID FIRST TRANSISTOR IS SET SO THAT THE CONTROL AFFECT HAS ALMOST REACHED ITS MAXIMUM VALUE BY THE TIME THE CONTROL OPERATION IS INITIATED BY SAID SECOND REVERSE CONTROLLED TRANSISTOR DUE TO APPLICATION OF SAID CONTROL VOLTAGE TO THE BASE OF SAID SECOND TRANSISTOR.