Selective signaling receiver

Claim 1

IN A SIGNAL RECEIVING APPARATUS HAVING AN INPUT CIRCUIT FOR RECEIVING TRAINS OF PULSES EACH BEING SEPARATED BY INTERTRAIN PAUSES AND EACH BEING THE CODE REPRESENTATION OF A DIGIT OF A NUMBERING SYSTEM, THE COMBINATION COMPRISING A DIGIT RESPONSIVE PULSE GENERATOR CIRCUIT CONNECTED TO SAID INPUT CIRCUIT, AN ADDRESS PULSE CONVERTING GENERATOR CONNECTED TO SAID INPUT CIRCUIT, A DIGIT COUNTING SHIFT REGISTER, AND AN ADDRESS PULSE COUNTING SHIFT REGISTER, AN INFORMATION BIT GENERATOR DRIVE CIRCUIT CONNECTED TO SAID DIGIT RESPONSIVE AND PULSE CONVERTING GENERATORS, SAID DRIVE CIRCUIT HAVING A COUNTER ACTIVATING OUTPUT LEAD CONNECTED TO SAID DIGIT AND ADDRESS PULSE COUNTING SHIFT REGISTERS IN TANDEM, AN ADVANCE CIRCUIT CONNECTING SAID ADDRESS PULSE CONVERTING GENERATOR TO SAID ADDRESS PULSE COUNTING REGISTER, A CONTROL CIRCUIT CONNECTING SAID DIGIT COUNTING SHIFT REGISTER TO SAID DIGIT RESPONSIVE GENERATOR FOR CAUSING SAID REGISTER, IN RESPONSE TO OUTPUTS FROM SAID DIGIT RESPONSIVE GENERATOR, TO COUNT THE NUMBER OF DIGITS, SAID CONTROL CIRCUIT BEING CONNECTED IN TANDEM TO SAID ADDRESS PULSE COUNTING REGISTER AND SAID DIGIT COUNTING REGISTER AND BEING UTILIZED IN SAID PULSE COUNTING REGISTER TO CLEAR ALL REGISTER STAGES EXCEPT THOSE DEFINING A DESIRED PERMUTATION, A UTILIZATION CIRCUIT, AND A LOGIC GATE CONNECTED BETWEEN SAID UTILIZATION CIRCUIT AND SAID DIGIT COUNTING AND ADDRESS PULSE COUNTING SHIFT REGISTERS AND RESPONSIVE TO THE COINCIDENCE OF OUTPUTS THEREFROM.