Statistical decision circuit

Claim 1

A STATISTICAL DECISION CIRCUIT COMPRISING A PLURALITY OF BINARY COUNTERS CONNECTED FOR SUCCESSIVE OPERATION, A CLOCK PULSE GENERATOR CONNECTED TO A LEADING BINARY COUNTER OF SAID BINARY COUNTERS FOR TRANSMITTING THERETO A CLOCK PULSE SIGNAL, A LOGIC CIRCUIT CONNECTED TO EACH OF SAID BINARY COUNTERS FOR SELECTIVELY CONTROLLING THE OPERATION THEREOF RESPECTIVELY TO PRODUCE IN THE OUTPUT OF A TRAILING BINARY COUNTER OF SAID BINARY COUNTERS A PULSE SIGNAL REPRESENTING A PRESELECTED ANSWER TO A DECISION AND TO ESTABLISH THE PROBABILITY OF A CORRECT DECISION, EACH OF SAID LOGIC CIRCUITS BEING OPERATIVE TO CONTROL THE OPERATION OF ITS ASSOCIATED BINARY COUNTER FOR SELECTING THE FREQUENCY OF THE PULSE SIGNAL ADVANCING THROUGH THE ASSOCIATED BINARY COUNTER, A COMPARATOR CIRCUIT, MEANS INTERCONNECTING SAID TRAILING BINARY COUNTER WITH SAID COMPARATOR CIRCUIT TO FEED TO SAID COMPARATOR CIRCUIT A SELECTED ANSWER PULSE SIGNAL, MEANS FOR FEEDING TO SAID COMPARATOR CIRCUIT A RANDOM PULSE SIGNAL REPRESENTING INFORMATION TO BE ANALYZED, SAID COMPARATOR CIRCUIT BEING OPERATIVE TO COMPARE SAID ANSWER PULSE SIGNAL WITH SAID RANDOM PULSE SIGNAL, AND INDICATING MEANS RESPONSIVE TO SAID COMPARATOR CIRCUIT FOR INDICATING A CORRECT OR AN INCORRECT ANSWER.