Serial cryogenic binary multiplier system

Claim 1

A SERIALLY OPERABLE BINARY MULTIPLIER SYSTEM COMPRISING A REGISTER HAVING FLIP-FLOPS FOR STORING THE DIGITS OF THE MULTIPLIER, A REGISTER HAVING FLIP-FLOPS FOR STORING THE DIGITS OF THE MULTIPLICAND, AT LEAST ONE OF SAID REGISTERS BEING A SHIFT REGISTER, THE INDIVIDUAL DIGIT FLIP-FLOPS OF SAID MULTIPLIER REGISTER BEING PAIRED IN ASCENDING DIGITAL ORDER WITH INDIVIDUAL DIGIT FLIP-FLOPS OF SAID MULTIPLICAND REGISTER IN DESCENDING DIGITAL ORDER, EACH PAIR HAVING AN INDIVIDUAL COINCIDENCE CIRCUIT CONNECTED THEREWITH, A MULTIPLE DIGIT ADDER COMPRISING AT LEAST ONE COUNTING NETWORK CONNECTED TO RECEIVE THE OUTPUTS FROM ALL OF SAID COINCIDENCE CIRCUITS AND OPERABLE TO GENERATE A COUNT OF ALL THE ONE DIGITS INDICATED THEREBY, AND A CODING NETWORK CONNECTED TO RECEIVE THE COUNT FROM SAID COUNTING NETWORK AND OPERABLE TO GENERATE BINARY SUM DIGITS AND CARRY DIGITS REPRESENTATIVE OF SAID COUNT, THE SYSTEM BEING OPERABLE TO READ OUT DIGITS FROM EACH OF SAID REGISTERS AT A READ CYCLE TIME INDICATING A COINCIDENCE OF ONES IN SAID FLIP-FLOP PAIRS FOR THE GENERATION OF A SUM REPRESENTING THE SUM OF ONE COLUMN OF AN ARRAY OF PARTIAL PRODUCTS, SAID REGISTERS BEING OPERABLE TO PROVIDE A RELATIVE SHIFT OF ONE DIGIT POSITION BETWEEN SAID MULTIPLIER AND SAID MULTIPLICAND AFTER EACH READ CYCLE TIME TO THEN CAUSE THE REPRESENTATION OF THE NEXT HIGHER ORDER OF SAID ARRAY OF PARTIAL PRODUCTS, AND DELAY STORAGE APPARATUS CONNECTED TO RECEIVE AND STORE EACH CARRY DIGIT FOR ADDITION IN SAID ADDING CIRCUIT ON A SUBSEQUENT READ CYCLE.