US3305707A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Transistor bias circuits
Assignee: SCM Corp
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Filing: 1964-04-23
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Granted: 1967-02-21
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Expires: 1984-04-23
Abstract
No abstract record available.
Inventors
- 👤 Robert S Wenman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 17:41
CPC Classifications
B; B41; B41J; B41J33/00; B41J33/14; B41J33/40; B41J33/44; B41J33/51; B41J33/514; B41J33/34; B41J9/00; B41J9/02; B41J9/10; G; G06; G06K; G06K13/00; G06K13/18; H; H04; H04L; H04L13/00; H04L13/02; H04L13/06; H04L17/00; H04L17/16; H04L17/30; H04L25/00; H04L25/02; H04L25/20; H04L25/24
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
309 words
IN COMBINATION: A POWER TRANSISTOR HAVING BASE, EMITTER AND COLLECTOR TERMINALS, MEANS CONNECTING ONE OF SAID TERMINALS TO A FIRST REFERENCE POTENTIAL AND ANOTHER OF SAID TERMINALS THROUGH A CURRENT COIL OF AN ELECTROMAGNET TO A SECOND REFERENCE POTENTIAL; A GERMANIUM DRIVER TRANSISTOR HAVING BASE, EMITTER AND COLLECTOR TERMINALS MEANS CONNECTING SAID DRIVER TRANSISTOR TO HAVE AN EMITTER-COLLECTOR CURRENT PATH THROUGH THE BASE AND SAID ONE TERMINAL OF SAID POWER TRANSISTOR TO SAID FIRST REFERENCE POTENTIAL AND THROUGH A CIRCUIT SEPARATE FROM SAID INDUCTOR TO SAID SECOND REFERENCE POTENTIAL; A SILICON DIODE CONNECTED ACROSS THE BASE AND ONE TERMINAL OF THE DRIVER TRANSISTOR, SAID DIODE HAVING A VOLTAGE DROP WHEN CONDUCTING WHICH EXCEEDS THE BARRIER POTENTIAL OF THE DRIVER TRANSISTOR AND POLED WHEN CONDUCTING TO PREVENT CURRENT CONDUCTION THROUGH THE DRIVER TRANSISTOR; AND MEANS FOR SELECTIVELY APPLYING A POTENTIAL OF A FIRST POLARITY RELATIVE TO SAID FIRST REFERENCE POTENTIAL TO THE BASE OF THE DRIVER TRANSISTOR TO CAUSE FORWARD CURRENT CONDUCTION THROUGH SAID DIODE AND PREVENT CURRENT CONDUCTION THROUGH SAID POWER TRANSISTOR AND A POTENTIAL OF OPPOSITE POLARITY TO THE BASE OF THE DRIVER TRANSISTOR TO CAUSE CONDUCTION THROUGH BOTH TRANSISTORS, SAID LAST MENTIONED MEANS COMPRISING A MONOSTABLE MULTIVIBRATOR CIRCUIT CONTAINING THIRD AND FOURTH TRANSISTORS, EACH HAVING BASE, EMITTER AND COLLECTOR TERMINALS; MEANS FOR CONNECTING THE EMITTER TERMINAL FROM SAID THIRD TRANSISTOR TO THE BASE OF THE DRIVER TRANSISTOR; MEANS FOR CONNECTING THE BASE OF SAID THIRD TRANSISTOR TO THE COLLECTOR TERMINAL OF SAID FOURTH TRANSISTOR; A FURTHER DIODE HAVING PROPERTIES SIMILAR TO THOSE OF SAID FIRST DIODE CONNECTED ACROSS THE BASE AND SAID EMITTER TERMINAL OF SAID THIRD TRANSISTOR TO BE IN SERIES CIRCUIT ARRANGEMENT WITH SAID FIRST DIODE AND POLED IN THE SAME DIRECTION AS SAID FIRST DIODE; AND MEANS FOR CHANGING THE CONDUCTION CONDITION OF SAID MULTIVIBRATOR CIRCUIT TO CONTROL CURRENT CONDUCTION THROUGH SAID POWER TRANSISTOR.
Claim 2
Dependent Claim
309 words
IN COMBINATION: A POWER TRANSISTOR HAVING BASE, EMITTER AND COLLECTOR TERMINALS, MEANS CONNECTING ONE OF SAID TERMINALS TO A FIRST REFERENCE POTENTIAL AND ANOTHER OF SAID TERMINALS THROUGH A CURRENT COIL OF AN ELECTROMAGNET TO A SECOND REFERENCE POTENTIAL; A GERMANIUM DRIVER TRANSISTOR HAVING BASE, EMITTER AND COLLECTOR TERMINALS MEANS CONNECTING SAID DRIVER TRANSISTOR TO HAVE AN EMITTER-COLLECTOR CURRENT PATH THROUGH THE BASE AND SAID ONE TERMINAL OF SAID POWER TRANSISTOR TO SAID FIRST REFERENCE POTENTIAL AND THROUGH A CIRCUIT SEPARATE FROM SAID INDUCTOR TO SAID SECOND REFERENCE POTENTIAL; A SILICON DIODE CONNECTED ACROSS THE BASE AND ONE TERMINAL OF THE DRIVER TRANSISTOR, SAID DIODE HAVING A VOLTAGE DROP WHEN CONDUCTING WHICH EXCEEDS THE BARRIER POTENTIAL OF THE DRIVER TRANSISTOR AND POLED WHEN CONDUCTING TO PREVENT CURRENT CONDUCTION THROUGH THE DRIVER TRANSISTOR; AND MEANS FOR SELECTIVELY APPLYING A POTENTIAL OF A FIRST POLARITY RELATIVE TO SAID FIRST REFERENCE POTENTIAL TO THE BASE OF THE DRIVER TRANSISTOR TO CAUSE FORWARD CURRENT CONDUCTION THROUGH SAID DIODE AND PREVENT CURRENT CONDUCTION THROUGH SAID POWER TRANSISTOR AND A POTENTIAL OF OPPOSITE POLARITY TO THE BASE OF THE DRIVER TRANSISTOR TO CAUSE CONDUCTION THROUGH BOTH TRANSISTORS, SAID LAST MENTIONED MEANS COMPRISING A MONOSTABLE MULTIVIBRATOR CIRCUIT CONTAINING THIRD AND FOURTH TRANSISTORS, EACH HAVING BASE, EMITTER AND COLLECTOR TERMINALS; MEANS FOR CONNECTING THE EMITTER TERMINAL FROM SAID THIRD TRANSISTOR TO THE BASE OF THE DRIVER TRANSISTOR; MEANS FOR CONNECTING THE BASE OF SAID THIRD TRANSISTOR TO THE COLLECTOR TERMINAL OF SAID FOURTH TRANSISTOR; A FURTHER DIODE HAVING PROPERTIES SIMILAR TO THOSE OF SAID FIRST DIODE CONNECTED ACROSS THE BASE AND SAID EMITTER TERMINAL OF SAID THIRD TRANSISTOR TO BE IN SERIES CIRCUIT ARRANGEMENT WITH SAID FIRST DIODE AND POLED IN THE SAME DIRECTION AS SAID FIRST DIODE; AND MEANS FOR CHANGING THE CONDUCTION CONDITION OF SAID MULTIVIBRATOR CIRCUIT TO CONTROL CURRENT CONDUCTION THROUGH SAID POWER TRANSISTOR.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1970-02-20 | 1970-08-22 | 1971-02-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1974-02-20 | 1974-08-22 | 1975-02-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1978-02-20 | 1978-08-22 | 1979-02-21 | $7700.00 | Window Closed / Lapsed |