Circuit to obtain the absolute value of the difference of two voltages

Claim 1

IN A CIRCUIT FOR OBTAINING THE ABSOLUTE DIFFERENCE OF TWO SIGNALS USING DIFFERENT PATHS FOR POSITIVE AND NEGATIVE SIGNAL VOLTAGES; (A) AN INPUT TERMINAL AND AN OUTPUT TERMINAL, SAID INPUT TERMINAL HAVING TWO SIGNALS APPLIED THERETO FOR OBTAINING THE ABSOLUTE DIFFERENCE THEREOF, (B) AN INPUT RESISTANCE CONNECTED BETWEEN SAID INPUT TERMINAL AND GROUND, AND AN OUTPUT RESISTANCE CONNECTED BETWEEN SAID OUTPUT TERMINAL AND GROUND, (C) A PAIR OF DIODES, ONE HAVING ITS ANODE AND THE OTHER HAVING ITS CATHODE CONNECTED TO SAID INPUT TERMINAL, (D) A FIRST CAPACITOR MEANS, AND A TRANSISTOR AMPLIFIER MEANS HAVING A COLLECTOR, EMITTER AND BASE, SAID TRANSSISTOR AMPLIFIER MEANS HAVING ITS COLLECTOR CONNECTED TO SAID OUTPUT TERMINAL THROUGH SAID FIRST CAPACITOR MEANS, (E) THE CATHODE OF SAID ONE DIODE CONNECTED TO THE BASE OF SAID TRANSISTOR AMPLIFIER MEANS, (F) A SECOND CAPACITOR MEANS, THE ANODE OF SAID OTHER DIODE CONNECTED TO SAID OUTPUT TERMINAL THROUGH SAID SECOND CAPACITOR MEANS, (G) THE POLARITY OF THE RESULTANT VALUE OF TWO SIGNALS APPLIED AT SAID INPUT TERMINAL BEING DEPENDENT UPON THE POLARITY AND AMPLITUDE OF THE APPLIED SIGNALS, (H) WHERE THE RESULTANT OF SAID INPUT SIGNALS IS NEGATIVE SAID ONE DIODE CONNECTED TO SAID OUTPUT TERMINAL CONDUCTS, SAID OTHER DIODE IS REVERSE BIASED, AND THE VOLTAGE ACROSS SAID OUTPUT RESISTANCE IS NEGATIVE, (I) WHERE THE RESULTANT OF SAID INPUT SIGNALS IS POSITIVE SAID ONE DIODE IS REVERSE BIASED AND SAID OTHER DIODE CONDUCTS APPLYING A POSITIVE INPUT VOLTAGE TO THE BASE OF SAID TRANSISTOR AMPLIFIER MEANS THUS THE OUTPUT SIGNAL AT THE COLLECTOR OF SAID TRANSISTOR AMPLIFIER MEANS IS NEGATIVE AND THEREFORE THE OUTPUT SIGNAL ACROSS SAID OUTPUT RESISTANCE AGAIN IS NEGATIVE.