Multiple-input memory accessing apparatus

Claim 1

MEMORY ADDRESS MODIFICATION APPARATUS COMPRISING: AN ADDRESSABLE MEMORY; A NUMBER OF MULTI-BIT WORD SOURCES, EACH SOURCE HAVING ONE OUTPUT FOR EACH BIT OF A MULTI-BIT WORD, FOR SUPPLYING OPERANDS TO BE COMBINED WITH EACH OTHER FOR THE PURPOSE OF ADDRESSING SAID MEMORY; A MATRIX OF FULL ADDERS, EACH FULL ADDER HAVING FIRST, SECOND AND THIRD INPUTS AND SUM AND CARRY OUTPUTS; SAID MATRIX COMPRISING A NUMBER OF LEVELS EQUAL TO SAID NUMBER OF MULTI-BIT WORD SOURCES MINUS ONE, EACH OF SAID LEVELS HAVING A NUMBER OF FULL ADDERS EQUAL TO THE NUMBER OF BITS IN THE LARGEST OF SAID OPERANDS; FIRST MEANS CONNECTING THE OUTPUTS OF THREE OF SAID MULTI-BIT WORD SOURCES TO THE INPUTS OF CORRESPONDING FULL ADDERS IN A FIRST LEVEL OF SAID MATRIX; SECOND MEANS CONNECTING THE OUTPUTS FROM EACH REMAINING ONE OF SAID MULTI-BIT WORD SOURCES TO THE FIRST INPUTS OF CORRESPONDING FULL ADDERS OF A DIFFERENT LEVEL OF SAID MATRIX SO THAT EACH LEVEL EXCEPT A LAST LEVEL AND SAID FIRST LEVEL OF SAID MATRIX RECEIVES THE OUTPUT FROM ONE AND ONLY ONE OF SAID SOURCES OF MULTI-BIT WORDS; THIRD MEANS CONNECTING THE SUM OUTPUT OF EACH ADDER IN EACH LEVEL EXCEPT SAID LAST LEVEL TO A SECOND INPUT OF THE CORRESPONDING ADDER IN THE SUCCEEDING LEVEL SO THAT THE SUM OUTPUT OF THE MTH ADDER IN THE NTH LEVEL IS CONNECTED TO A SECOND INPUT OF THE MTH ADDER IN THE (N+1)ST LEVEL; FOURTH MEANS CONNECTING THE CARRY OUTPUT OF EACH ADDER EXCEPT THE HIGHEST ORDER ADDER OF EACH LEVEL EXCEPT SAID LAST LEVEL TO A THIRD INPUT OF THE NEXT HIGHER ORDER ADDER IN THE SUCCEEDING LEVEL SO THAT THE CARRY OUTPUT OF THE MTH ADDER IN THE NTH LEVEL IS CONNECTED TO THE THIRD INPUT OF THE (M+1)ST ADDER IN THE (N+1)ST LEVEL; FIFTH MEANS CONNECTING THE CARRY OUTPUT OF EACH ADDER OF SAID LAST LEVEL EXCEPT THE HIGHEST ORDER ADDER OF SAID LAST LEVEL TO THE FIRST INPUT OF THE NEXT HIGHER ORDER ADDER IN SAID LAST LEVEL SO THAT THE CARRY OUTPUT OF THE MTH ADDER OF THE LAST LEVEL IS CONNECTED TO THE FIRST INPUT OF THE (M+1)ST ADDER OF THE LAST LEVEL; A SOURCE OF INCREMENTING SIGNALS; MEANS CONNECTING SAID SOURCE OF INCREMENTING SIGNALS TO THE THIRD INPUT OF THE LOWEST ORDER ADDER IN EACH LEVEL EXCEPT SAID FIRST LEVEL FOR INCREMENTING ADDRESS WORDS; AND MEANS CONNECTING THE SUM OUTPUT OF EACH ADDER IN SAID LAST LEVEL TO SAID ADDRESSABLE MEMORY FOR SUPPLYING MODIFIED ADDRESS WORDS THAT HAVE BEEN FORMED AS A FUNCTION OF SAID OPERANDS AND INCREMENTS.