Controlled pulse progression circuits with complementary transistors

Claim 1

IN A PULSE PROGRESSION CIRCUIT, THE COMBINATION COMPRISING A PLURALITY OF BREAKDOWN DEVICES, EACH OF SAID BREAKDOWN DEVICES COMPRISING A SWITCHING TRANSISTOR AND AN OUTPUT TRANSISTOR COUPLED TO SAID SWITCHING TRANSISTOR FOR LATCHING SAID SWITCHING TRANSISTOR IN BOTH CONDUCTIVE AND NONCONDUCTIVE STATES, SAID SWITCHING TRANSISTOR ALSO LATCHING SAID OUTPUT TRANSPONDING TO SAID CONDUCTIVE AND NONCONDUCTIVE STATES OF SAID SWITCHING TRANSISTOR, AN ENERGIZING CIRCUIT CONNECTED TO SAID BREAKDOWN DEVICES AND INCLUDING AN IMPEDANCE COMMON TO ALL OF SAID SWITCHING TRANSISTORS FOR LIMITING CONDUCTION IN SAID BREAKDOWN DEVICES TO ONLY ONE DEVICE AT ANY ONE TIME, AN INPUT CIRCUIT RESPONSIVE TO AN INPUT PULSE FOR STOPPING CONDITION IN ALL OF SAID BREAKDOWN DEVICES, COUPLING MEANS CONNECTED BETWEEN SAID DEVICES IN SEQUENCE AND INCLUDING MEANS FOR PRODUCING A TRANSFER SIGNAL IN RESPONSE TO THE STOPPING OF CONDUCTION IN ANY ONE OF SAID DEVICES FOR INITIATING CONDUCTION IN THE NEXT DEVICE IN THE SEQUENCE, SAID DEVICES THEREBY BEING RENDERED SUCCESSIVELY CONDUCTIVE IN RESPONSE TO SUCCESSIVE INPUT PULSES, AND SETTING MEANS FOR SELECTIVELY APPLYING A SETTING SIGNAL TO ONE OF SAID BREAKDOWN DEVICES FOR LATCHING SAID TRANSISTORS THEREOF IN A CONDUCTIVE STATE, SAID SETTING SIGNAL HAVING A DURATION GREATER THAN SAID TRANSFER SIGNAL.