High speed asynchronous computer

Claim 1

A FIRST AND SECOND LINE, EACH ADAPTED TO CARRY THEREON ONE OF TWO VOLTAGE LEVELS, A THIRD AND FOURTH LINE, EACH ADAPTED TO CARRY THEREON ONE OF SAID TWO VOLTAGE LEVELS WHEREIN A HIGH VOLTAGE LEVEL ON HIGH FIRST AND SECOND LINES REPRESENTS A FIRST BINARY DIGIT, A LOW VOLTAGE LEVEL ON SAID FIRST AND SECOND LINES REPRESENT A SECOND BINARY DIGIT, A LOW AND A HIGH LEVEL ON SAID FIRST AND SECOND LINES REPRESENT AN ABSENCE OF INFORMATION, AND A HIGH AND A LOW LEVEL ON SAID FIRST AND SECOND LINES REPRESENT AN EXCLUDED CONDITION, AND WHEREIN CORRESPONDING VOLTAGE LEVELS ON SAID THIRD AND FOURTH LINES REPRESENT CORRESPONDING DESIGNATIONS, A FIRST BUFFER-INVERTER COUPLED TO SAID FIRST AND THIRD LINES, A SECOND BUFFER-INVERTER COUPLED TO SAID SECOND AND FOURTH LINES, A FIFTH LINE COUPLED TO THE OUTPUT OF SAID SECOND BUFFER-INVERTER, AND A SIXTH LINE COUPLED TO THE OUTPUT OF SAID FIRST BUFFER-INVERTER, WHEREBY ALL THE VOLTAGE LEVELS ON SAID FIFTHE AND SIXTH LINES ARE EACH HIGH WHEN ALL THE VOLTAGE LEVELS ON SAID FIRST, SECOND, THIRD, AND FOURTH LINES ARE EACH LOW.