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US3289079A Expired / Lapsed US ⏱️ 0.0 years remaining

R. m. s. measuring system having an integrating circuit including a transistorized capacitor discharge means controlled by the measured signal

Assignee: DUFFERS ASS
•
Filing: 1963-03-04
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Granted: 1966-11-29
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Expires: 1983-03-04
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Abstract

No abstract record available.

Inventors

  • 👤 Hugo S Ferguson

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 03:17
CPC Classifications
G; G01; G01R; G01R15/00

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 182 words
IN A METER FOR INDICATING THE R.M.S. VALUE OF A.-C. PULSES INCLUDING A RESISTANCE-CAPACITANCE INTEGRATING CIRCUIT, MEANS FOR SUPPLYING A.-C. PULSES TO SAID INTEGRATING CIRCUIT TO CHARGE SAID CAPACITANCE, DISCHARGE MEANS FOR HALTING CHARGING OF THE SAID CAPACITANCE WHEN THE INTEGRATED SIGNAL THEREON BECOMES SUBSTANTIALLY EQUAL TO THE INSTANTANEOUS VALUE OF THE TRAILING EDGE OF THE RESPECTIVE PULSE AND DISCHARGING THE CAPACITANCE PRIOR TO THE INTEGRATION OF A SUCCEEDING PULSE, AND INDICATING MEANS RESPONSIVE TO SAID INTEGRATED SIGNAL, THE IMPROVEMENT IN SAID DISCHARGE MEANS WHICH COMPRISES (A) A DISCHARGE TRANSISTOR HAVING THE EMITTER-COLLECTOR CIRCUIT THEREOF CONNECTED ACROSS SAID CAPACITANCE, (B) A CONTROL TRANSISTOR HAVING THE BASE THEREOF CONNECTED TO RECEIVE SAID A.-C. PULSES AND THE EMITTER THEREOF DIRECT-CONNECTED TO THE BASE OF THE DISCHARGE TRANSISTOR, (C) AND MEANS FOR BIASING SAID DIRECT-CONNECTED EMITTER AND BASE THROUGH A LOAD IMPEDANCE TO A POTENTIAL OF OPPOSITE POLARITY TO THE POTENTIAL ACROSS SAID CAPACITANCE DURING THE CHARGING THEREOF, (D) SAID DISCHARGE AND CONTROL TRANSISTORS BEING OF OPPOSITE POLARITY TYPES WITH THE CONTROL TRANSISTOR CONDUCTING AND THE DISCHARGING TRANSISTOR NON-CONDUCTING DURING THE CHARGING OF SAID CAPACITANCE.
Claim 2
Dependent Claim 182 words
IN A METER FOR INDICATING THE R.M.S. VALUE OF A.-C. PULSES INCLUDING A RESISTANCE-CAPACITANCE INTEGRATING CIRCUIT, MEANS FOR SUPPLYING A.-C. PULSES TO SAID INTEGRATING CIRCUIT TO CHARGE SAID CAPACITANCE, DISCHARGE MEANS FOR HALTING CHARGING OF THE SAID CAPACITANCE WHEN THE INTEGRATED SIGNAL THEREON BECOMES SUBSTANTIALLY EQUAL TO THE INSTANTANEOUS VALUE OF THE TRAILING EDGE OF THE RESPECTIVE PULSE AND DISCHARGING THE CAPACITANCE PRIOR TO THE INTEGRATION OF A SUCCEEDING PULSE, AND INDICATING MEANS RESPONSIVE TO SAID INTEGRATED SIGNAL, THE IMPROVEMENT IN SAID DISCHARGE MEANS WHICH COMPRISES (A) A DISCHARGE TRANSISTOR HAVING THE EMITTER-COLLECTOR CIRCUIT THEREOF CONNECTED ACROSS SAID CAPACITANCE, (B) A CONTROL TRANSISTOR HAVING THE BASE THEREOF CONNECTED TO RECEIVE SAID A.-C. PULSES AND THE EMITTER THEREOF DIRECT-CONNECTED TO THE BASE OF THE DISCHARGE TRANSISTOR, (C) AND MEANS FOR BIASING SAID DIRECT-CONNECTED EMITTER AND BASE THROUGH A LOAD IMPEDANCE TO A POTENTIAL OF OPPOSITE POLARITY TO THE POTENTIAL ACROSS SAID CAPACITANCE DURING THE CHARGING THEREOF, (D) SAID DISCHARGE AND CONTROL TRANSISTORS BEING OF OPPOSITE POLARITY TYPES WITH THE CONTROL TRANSISTOR CONDUCTING AND THE DISCHARGING TRANSISTOR NON-CONDUCTING DURING THE CHARGING OF SAID CAPACITANCE.

References Cited (Backward Citations)

US3201688A Cited
US3105160A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1969-11-28 1970-05-30 1970-11-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1973-11-28 1974-05-30 1974-11-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1977-11-28 1978-05-30 1978-11-29 $7700.00 Window Closed / Lapsed

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