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US3289013A Expired / Lapsed US ⏱️ 0.0 years remaining

Transistor a. c. gate circuit

Assignee: Individual
•
Filing: 1964-02-26
•
Granted: 1966-11-29
•
Expires: 1984-02-26
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Abstract

No abstract record available.

Inventors

  • 👤 George A Gallant
  • 👤 Conrad N White

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 06:51
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/28

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 203 words
A GATING SYSTEM IN WHICH THE SIGNAL TO BE GATED IS UTILIZED TO CAUSE THE GATE TO BE TURNED ON AND OFF COMPRISING: A BISTABLE MULTIVIBRATOR HAVING AN INPUT AND A PAIR OF OUTPUTS; MEANS FOR SAMPLING A PORTION OF SAID SIGNAL HAVING A PAIR OF OUTPUTS AND A PAIR OF INPUTS, EACH OF SAID INPUTS CONNECTED TO A RESPECTIVE OUTPUT OF SAID BISTABLE MULTIVIBRATOR: A GATE TRANSISTOR HAVING AN INPUT ELECTRODE AND AN OUTPUT ELECTRODE; A CAPACITOR CONNECTED BETWEEN ONE OF THE OUTPUTS OF SAID MULTIVIBRATOR AND THE INPUT ELECTRODE OF SAID GATE TRANSISTOR; A RECTIFYING NETWORK HAVING ITS INPUTS CONNECTED TO THE OUTPUTS OF SAID SAMPLING MEANS; AND AN INTEGRATING MEANS; THE OUTPUT OF SAID RECTIFTING NETWORK CONNECTED TO SAID INTEGRATING MEANS AND A SECOND TRANSISTOR HAVING A BASE ELECTRODE, EMITTER ELECTRODE AND A COLLECTOR ELECTRODE, THE EMITTER ELECTRODE OF SAID SECOND TRANSISTOR CONNECTED TO ONE END OF SAID CAPACITOR AND SAID COLLECTOR ELECTRODE OF SAID SECOND TRANSISTOR CONNECTED TO THE OTHER END OF SAID CAPACITOR, SAID BASE ELECTRODE OF SAID SECOND TRANSISTOR CONNECTED TO SAID INTEGRATING MEANS WHEREBY SIGNALS ARE GATED TO THE OUTPUT ELECTRODE OF SAID GATE TRANSISTOR IN RESPONSE TO A CONTROL SIGNAL DEVELOPED BY SAID INTEGRATING MEANS.
Claim 2
Dependent Claim 203 words
A GATING SYSTEM IN WHICH THE SIGNAL TO BE GATED IS UTILIZED TO CAUSE THE GATE TO BE TURNED ON AND OFF COMPRISING: A BISTABLE MULTIVIBRATOR HAVING AN INPUT AND A PAIR OF OUTPUTS; MEANS FOR SAMPLING A PORTION OF SAID SIGNAL HAVING A PAIR OF OUTPUTS AND A PAIR OF INPUTS, EACH OF SAID INPUTS CONNECTED TO A RESPECTIVE OUTPUT OF SAID BISTABLE MULTIVIBRATOR: A GATE TRANSISTOR HAVING AN INPUT ELECTRODE AND AN OUTPUT ELECTRODE; A CAPACITOR CONNECTED BETWEEN ONE OF THE OUTPUTS OF SAID MULTIVIBRATOR AND THE INPUT ELECTRODE OF SAID GATE TRANSISTOR; A RECTIFYING NETWORK HAVING ITS INPUTS CONNECTED TO THE OUTPUTS OF SAID SAMPLING MEANS; AND AN INTEGRATING MEANS; THE OUTPUT OF SAID RECTIFTING NETWORK CONNECTED TO SAID INTEGRATING MEANS AND A SECOND TRANSISTOR HAVING A BASE ELECTRODE, EMITTER ELECTRODE AND A COLLECTOR ELECTRODE, THE EMITTER ELECTRODE OF SAID SECOND TRANSISTOR CONNECTED TO ONE END OF SAID CAPACITOR AND SAID COLLECTOR ELECTRODE OF SAID SECOND TRANSISTOR CONNECTED TO THE OTHER END OF SAID CAPACITOR, SAID BASE ELECTRODE OF SAID SECOND TRANSISTOR CONNECTED TO SAID INTEGRATING MEANS WHEREBY SIGNALS ARE GATED TO THE OUTPUT ELECTRODE OF SAID GATE TRANSISTOR IN RESPONSE TO A CONTROL SIGNAL DEVELOPED BY SAID INTEGRATING MEANS.

References Cited (Backward Citations)

US2545665A Cited
US2793554A Cited
US3150228A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1969-11-28 1970-05-30 1970-11-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1973-11-28 1974-05-30 1974-11-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1977-11-28 1978-05-30 1978-11-29 $7700.00 Window Closed / Lapsed

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