Pulse counting circuit which simultaneously indicates the occurrence of the nth pulse

Claim 1

IN COMBINATION: A. A VOLTAGE SOURCE HAVING FIRST AND SECOND TERMINALS; B. INDICATING MEANS CONNECTED IN SERIES WITH SAID SOURCE TERMINALS FOR INDICATING THE MAGNITUDE OF CURRENT PASSING THROUGH SAID INDICATING MEANS; C. FIRST CURRENT CONTROL MEANS INCLUDING A FIRST TRANSISTOR CONNECTED IN SERIES WITH SAID INDICATING MEANS BETWEEN SAID SOURCE TERMINALS; D. AN INPUT SIGNAL COMPRISING A SOURCE OF PERIODIC VARYING VOLTAGE; E. FIRST TRANSISTOR BIASING MEANS RESPONSIVE TO SAID INPUT SIGNAL AND COUPLED TO SAID FIRST TRANSISTOR FOR ABRUPTLY VARYING THE CONDUCTION OF SAID FIRST TRANSISTOR FROM SUBSTANTIALLY FULLY CONDUCSTIVE TO SUBSTANTIALLY NON-CONDUCTIVE ONCE EACH CYCLE OF SAID INPUT SIGNAL SO AS TO CAUSE SAID FIRST TRANSISTOR TO DEVELOP AN OUTPUT BETWEEN FIXED AMPLITUDE LIMITS; F. ELECTRICAL DIFFERENTIATION MEANS COMPRISING A CAPACITOR AND ELECTRICAL RESISTANCE IN SERIES HAVING THE FREE END OF THE CAPACITOR COUPLED TO THE JUNCTION OF SAID INDICATING MEANS AND SAID FIRST TRANSISTOR AND THE FREE END OF THE RESISTOR COUPLED TO ONE OF SAID VOLTAGE SOURCE TERMINALS FOR PROVIDING A PULSE OF CURRENT FOR EACH CYCLE OF VARYING CONDUCTION OF SAID FIRST TRANSISTOR; G. SECOND CURRENT CONTROL MEANS INCLUDING IMPEDANCE MEANS CONNECTED IN SERIES WITH SAID INDICATING MEANS BETWEEN SAID SOURCE TERMINALS AND RESPONSIVE TO AN ELECSTRICAL INPUT FOR PRODUCING AN ABRUPT CHANGE IN IMPEDANCE; H. INTEGRATING CONTROL MEANS RESPONSIVE TO THE INPUT OF SAID DIFFERENTIATION MEANS FOR PROVIDING AN ELECTRICAL INPUT TO SAID IMPEDANCE MEANS IN RESPONSE TO A PREDETERMINED NUMBER OF SAID PULSES FROM SAID DIFFERENTIATION MEANS.